Chiplet Design Architect

Job Title

Chiplet Design Architect

Role Summary

Define architecture for next-generation chiplet-based compute platforms and own key platform subsystems (PCIe, die-to-die connectivity, system management, and confidential computing) for high-performance RISC-V CPU systems.

Collaborate with architecture, hardware, firmware, OS, virtualization, and external IP partners to deliver production-ready, scalable System-in-Package (SiP) solutions.

Experience Level

Senior — typically requires 10+ years of experience in SoC, CPU, or chiplet architecture; candidates will be assessed during interviews and level may be adjusted.

Responsibilities

Primary responsibilities include defining platform architecture, integrating subsystems, and driving cross-functional execution.

• Architect chiplet and SiP platforms for high-performance CPUs.
• Own platform subsystems: PCIe root complex, RCiEP, die-to-die connectivity, coherent fabrics (e.g., CHI-C2C), IOMMU, ATS/PRI, MSI, and CXL.mem.
• Design and validate system management: boot, reset, debug, and power-management flows for server-class CPUs.
• Specify and integrate confidential computing capabilities (e.g., TEE-I/O) into the platform.
• Work closely with hardware, firmware, OS, virtualization, and external IP teams to ensure system-level performance, security, and reliability.
• Document architectural trade-offs, communicate decisions, and drive alignment across engineering and partner organizations.

Requirements

Must-have technical skills and enforceable constraints for the role.

• 10+ years of experience in SoC, CPU, or chiplet architecture for high-performance or server-class systems.
• Proven ability to lead cross-functional architecture efforts and influence technical direction.
• Deep expertise in PCIe (Root Complex, RCiEP), coherent fabrics (including CHI-C2C), IOMMU, ATS/PRI, MSI, and CXL.mem.
• Experience with confidential computing technologies (e.g., TEE-I/O) and designing security-aware architectures.
• Strong understanding of system management: boot, reset, debug, and power management for high-performance CPUs.
• Comfortable making architectural decisions in fast-moving environments with evolving requirements.
• Must be eligible to access U.S. export-controlled technology; employment may be contingent on citizenship, permanent residency, or prior license approval.

Nice-to-have:

• Experience with RISC-V CPU platforms, virtualization, or server platform integration.
• Experience integrating third-party IP into complex SoCs and SiPs.
• Prior work on die-to-die communication, SiP packaging, or coherent memory systems.

Education Requirements

Bachelor's, Master's, or Ph.D. in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.