Chip Lead, Silicon Co-Design Group

Job Title

Chip Lead, Silicon Co-Design Group

Role Summary

The Chip Lead is the primary technical owner for a major silicon program in NVIDIA's Silicon Co-Design Group (SCG). This role partners across architecture, design, validation, software, and manufacturing to ensure the chip's technical integrity from early architecture through product delivery.

The role focuses on resolving the program's hardest multi-functional technical problems, guiding feature integration, stewarding qualification/playbook decisions, and presenting clear technical options to executive leadership.

Experience Level

Senior — requires extensive industry experience (12+ years) in post-silicon bring-up, validation, or system integration leadership at a major semiconductor company.

Responsibilities

Accountable for the technical direction and cross-functional resolution of complex silicon issues. Typical responsibilities include:

• Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs.
• Co-lead program-level feature integration from chip to system; identify and resolve inter-functional dependencies.
• Drive root-cause analysis and resolution for the program’s hardest multi-team bugs (e.g., HBM, power/thermal, high-speed I/O, packaging).
• Steward and adapt the qualification playbook; define mitigations and capture reusable lessons and methodology.
• Surface key risks, trade-offs, and mitigations as decision-ready options for executive leadership.
• Mentor Chip Leads on adjacent programs and contribute to group-wide methodology via post-mortems and write-ups.
• Lead Critical Debug and Technical Execution forums and represent the chip externally regarding technical risk.

Requirements

Must-have and preferred qualifications for success in this role.

• Must-have: 12+ years of relevant industry experience in post-silicon bring-up, validation, or system integration leadership, with work on multiple shipped silicon products.
• Must-have: Strong end-to-end understanding of SoC and ASIC architecture and recognized expertise in at least one subsystem such as HBM, SerDes, power & thermal, or packaging.
• Must-have: Demonstrated impact at the silicon level (e.g., faster bring-up, fewer escapes, yield recovery, methodology contributions) and experience turning ambiguous multi-team failures into root-cause closure and reusable workarounds.
• Must-have: Proven ability to guide technical decisions across functional boundaries without direct authority and to translate complex silicon issues into clear options for executives.
• Nice-to-have: Prior experience as a Chip Lead, Project Tech Lead, Principal/Distinguished Engineer on GPU, AI accelerator, CPU, networking ASIC, or other large SoC.
• Nice-to-have: Patents, conference papers, invited talks, or recognized contributions to silicon validation, post-silicon debug, or co-design integration.
• Nice-to-have: History of building reusable methodology (playbooks, debug frameworks) and hands-on debug experience with HBM, high-speed I/O, power/thermal, or packaging.
• Nice-to-have: Experience working with globally distributed teams and using AI tools to increase team velocity.

Education Requirements

BS or MS in Electrical Engineering or Computer Engineering (or equivalent practical experience) — degrees or equivalent experience referenced in the posting. (Equivalent practical experience is accepted.)

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.