Chip Integration Engineer

Role Summary

The Network Switch Group at Broadcom develops cutting-edge networking ASICs and multichip solutions for L2/L3 switch routing. This role focuses on chip integration and RTL design for network switch/routing designs.

Experience Level

Mid-level, requiring approximately 6 years with MSEE or 8 years with BSEE.

Responsibilities

The Chip Integration Engineer will be responsible for:

• Defining microarchitecture and implementing chip top-level modules for ASICs.
• Chip-level integration of functional blocks, soft/hard IPs, I/Os, and memories.
• Collaboration with design teams on microarchitecture and interface definition.
• Planning physical implementation and initial floor planning of chip-level blocks.
• Developing Verilog RTL, providing design verification support, and conducting timing analysis.
• Working closely with the physical implementation team throughout the design process.

Requirements

Applicants must have:

• MSEE +6 years of experience or BSEE +8 years with a focus on digital design.
• In-depth knowledge of IC technology, ASIC design flows, and EDA tools.
• Thorough understanding of high-speed Ethernet networking and CPU I/O bus technologies.
• Excellent knowledge of SystemVerilog and experience with simulators and waveform debugging tools.
• Strong skills in Perl, Python, or other scripting languages.
• Excellent verbal and written communication skills.

Education Requirements

Master's degree in Electrical Engineering or related field, or Bachelor's degree with additional experience.

About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.