CAD Verification Director

Job Title

CAD Verification Director

Role Summary

Lead and direct a verification CAD team responsible for verification tooling, automation, and methodology for complex silicon designs. Own strategy, architecture, and delivery of formal and dynamic verification flows and collaborate with design, verification, and EDA partners to ensure scalable, robust verification infrastructure.

Experience Level

Senior role. Targeted experience: 18+ years in CAD or verification engineering with significant leadership responsibility; prior experience managing global, multi-site teams.

Responsibilities

Primary responsibilities include defining strategy, delivering verification infrastructure, and leading a distributed team.

• Define and execute long-term roadmap for verification CAD infrastructure covering formal and dynamic methodologies.
• Lead, mentor, and grow a team of CAD engineers focused on tooling, automation, and methodology.
• Architect and deploy formal verification flows (property checking, equivalence checking, model checking) and integrate formal tools.
• Oversee dynamic simulation infrastructure including UVM testbench support, regression automation, and coverage analysis.
• Optimize simulation performance and scalability across compute farms and cloud environments.
• Develop reusable scripts, APIs, and frameworks to streamline verification workflows and ensure CI/CD and version control integration.
• Collaborate with EDA vendors to influence tool features and resolve technical challenges.
• Promote assertion-based verification, formal coverage metrics, and hybrid formal-dynamic flows across teams.

Requirements

Must-have technical skills and experience for day-one competence in this role.

• 18+ years of experience in CAD or verification engineering with proven leadership and program ownership.
• Proven track record deploying formal and dynamic verification methodologies at scale.
• Strong scripting and automation skills (Python, Perl, Tcl) and experience integrating CAD tools.
• Deep knowledge of UVM, SystemVerilog assertions, functional coverage, and constrained-random verification.
• Experience optimizing simulation performance and managing large regression farms and cloud compute resources.
• Familiarity with using AI/ML techniques in verification and debug workflows.
• Experience collaborating with EDA vendors and driving tool adoption and feature changes.
• Strong communication skills and experience coordinating across geographically distributed teams.

Education Requirements

Degrees expected: Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Computer Engineering, Engineering, or a related technical field. The posting lists degree-to-experience equivalencies: Bachelor's +8 years, Master’s +7 years, PhD +6 years for hardware-engineering roles; the role also states a preferred profile of 18+ years of CAD/verification experience. No specific certifications were listed.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.