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Associate Staff CAD Engineer - Physical Verification

Silicon Labs
July 30, 2026
Full-time
On-site
Austin, Texas, United States
$124,600 - $231,400 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Associate Staff CAD Engineer - Physical Verification

Role Summary

Join the Central CAD group's Physical Verification (PV) team to develop and support physical verification rule decks (DRC, LVS, antenna, dummy fill, extraction) and associated flows. The role partners with design, layout, foundry, ESD, and CAD teams and external tool vendors to deliver robust PV flows and debug issues.

Experience Level

Senior — typically 10+ years of related professional experience.

Responsibilities

Core responsibilities include rule development, automation, and cross-functional coordination to ensure designs meet foundry and internal PV requirements.

  • Develop and maintain physical verification rule decks (DRC, LVS, antenna, density, dummy fill, extraction).
  • Run and improve PV flows, automation, and methodologies to increase quality and performance.
  • Lead and conduct impact analysis meetings and collect specifications from stakeholders for deck releases.
  • Support design and layout teams to diagnose and resolve PV-related issues during the design cycle.
  • Create and run QA testcases and perform code reviews to validate rule decks.
  • Evaluate and benchmark new tools and features; work with vendors to report and track software bugs.

Requirements

Must-have technical skills and experience.

  • Strong expertise developing and supporting DRC, antenna, density, and dummy-fill rule decks using Calibre SVRF or equivalent languages.
  • Working knowledge of physical verification tools such as Calibre RVE and Calibre DRV, and layout tools (e.g., Virtuoso).
  • Proficiency in scripting (Perl, Python, shell) for automation and custom utilities.
  • Proven ability to drive PV flows from specification through release and adoption and to work closely with design/layout engineers to debug issues.
  • Experience collaborating across CAD, design, layout, ESD, and foundry teams and running stakeholder impact analyses.
  • Ability to mentor junior engineers and provide technical guidance across PV decks and methodologies.

Nice-to-have:

  • Experience coding LVS, extraction, and PERC rule decks.
  • Familiarity with AI-powered tools that assist productivity, analysis, or decision-making.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering is specified. The posting also indicates approximately 10+ years of related professional experience.


About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.

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Date Posted: 2026-07-29