ASIC Verification Engineer
Sql PagerJob Title
ASIC Verification Engineer
Role Summary
Lead verification efforts for a latency-optimized SoC and its AI accelerator IP. The role focuses on verification strategy, environment and emulation development, test planning, and post-silicon bring-up to ensure product delivery for real-time, mission-critical applications.
Experience Level
Senior — lead-level role. Requires substantial ASIC and verification experience, including team leadership responsibilities.
Responsibilities
The ASIC Verification Lead will define verification strategy and execute verification activities across chip and block levels.
- Participate in architecture definition, modeling and micro-architecture reviews.
- Develop verification and emulation environments for chip and blocks.
- Create and maintain chip- and block-level test plans.
- Develop post-silicon bring-up scripts and plans; support silicon validation.
- Collaborate with design, software and hardware teams to drive releases and resolve issues.
- Mentor and lead verification engineers; establish verification best practices and quality standards.
Requirements
Key technical and leadership requirements. Must-have items are listed first.
- Must-have: 5+ years experience leading ASIC verification teams and managing verification projects.
- Must-have: Experience in high-performance data center or similar ASIC verification domains.
- Must-have: Strong knowledge of ASIC design and verification methodologies and flows.
- Must-have: Hands-on experience with SystemVerilog and C++.
- Nice-to-have: Experience with verification emulation platforms and post-silicon bring-up.
- Nice-to-have: Prior work on latency-optimized accelerators or AI SoC projects.
Education Requirements
MS with 10+ years of experience or PhD with 8+ years of experience. The posting also specifies 5+ years in ASIC verification team lead and management.
About the Company
Company: Sql Pager
Recruiting or staffing organization advertising an ASIC Verification Engineer role for a client building low-latency AI accelerator SoCs.
