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ASIC Power Management Architect

Google
May 05, 2026
Full-time
On-site
Mountain View, California, United States
SoC Architecture Jobs, Level - Senior

Job Title

ASIC Power Management Architect

Role Summary

Google seeks an architect to lead power-related architectural analysis and modeling for custom silicon used in consumer products. The role focuses on translating pre-silicon estimates into customer-use-case (CUJ) power models, proposing mempath architectural features, and enabling accurate end-to-end power correlation.

Experience Level

Senior — requires substantial industry experience; posting specifies approximately 8 years of relevant experience.

Responsibilities

The role is responsible for power-related architectural analysis, modeling, and recommendations across pre-silicon and silicon verification flows.

  • Collect and analyze silicon traffic patterns for key tensor CUJs and map them to pre-silicon CUJ estimates.
  • Drive architectural analysis for mempath traffic patterns and propose feature/requirement improvements to meet KPIs.
  • Oversee end-to-end correlation from pre-silicon micro-benchmark power estimates to CUJ modeling estimates, validating architectural assumptions used for modeling.
  • Develop algorithms, models, and analyses for alternative architecture approaches to optimize power and performance.
  • Model and validate power behavior in virtual prototyping and TLM environments.

Requirements

Must-have technical skills and experience required for success in this role.

  • Minimum ~8 years experience in ASIC power management architecture.
  • Experience with hardware or software power control flows and power methodology.
  • Experience with power components, power modeling, and power management techniques such as DVFS/AVS.
  • Experience modeling and validating designs in virtual prototyping and TLM environments.
  • Knowledge of how software and architectural design decisions affect power and thermal system behavior.

Nice-to-have:

  • Experience correlating pre-silicon estimates to silicon measurements and CUJ modeling.
  • Prior work proposing or implementing mempath or similar microarchitectural power features.

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Preferred: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with emphasis on computer architecture.


About the Company

Company: Google

Headquarters: Mountain View, CA, United States

Google is a global technology company that develops Internet services and products including search, advertising, cloud computing, AI, software, hardware, and custom silicon for consumer and enterprise applications.

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Date Posted: 2026-05-03