ASIC Physical Design Staff Engineer
Senior ASIC physical design engineer responsible for implementing and hardening DDR and HBM PHYs for customer ASICs and SoCs. Work includes synthesis, physical design, verification, DFT, and ATPG within a service line focused on PHY hardening.
The role contributes as a senior design team member or project design engineer, coordinating with internal and external teams and providing technical leadership and mentoring to junior engineers.
Senior — typically 5+ years of relevant ASIC physical design experience.
Principal responsibilities include hands-on implementation and technical leadership across PHY projects.
Must-have technical skills and experience for successful performance in this role.
Not specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
