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ASIC Physical Design, Sr Engineer

Synopsys
April 07, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Level - Senior

Role Summary

The ASIC Physical Design, Sr Engineer will be responsible for leading physical design implementations and ensuring the seamless integration of the design flow in the ASIC development process.

Experience Level

Senior level position.

Responsibilities

The key responsibilities include:

  • Leading physical design activities from netlist to GDSII.
  • Collaborating with design teams to ensure design integrity and manufacturability.
  • Using industry-standard tools for floorplanning, placement, and routing.
  • Performing timing analysis and optimization for various design scenarios.
  • Working closely with DFT and Verification teams for robust design.

Requirements

Strong candidates will possess the following:

  • Expertise in ASIC physical design processes and tools.
  • Proficiency in scripting languages such as TCL or Perl.
  • A deep understanding of CMOS technology and fabrication processes.
  • Experience with timing, noise, and power optimization techniques.
  • Strong problem-solving skills and ability to work independently.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-04-07