ASIC Physical Design Apprentice (Internship)
SynopsysJob Title
ASIC Physical Design Apprentice (Internship)
Role Summary
This is a 12-month, full-time in-office apprenticeship on the physical implementation team in Noida, India. The apprentice will work on digital implementation and physical design tasks for mixed-signal IP and subsystems under guidance from experienced engineers.
The role provides hands-on exposure to implementation flows, physical verification, DFM, and Synopsys toolsets to build practical ASIC/SoC physical-design skills.
Experience Level
Entry-level (Internship). Targeted at fresh graduates from the class of 2024 or 2025; applicants should not be currently enrolled in postgraduate programs or employed full-time.
Responsibilities
Typical activities and deliverables during the apprenticeship include:
- Participate in the full digital implementation flow: floor-planning, timing constraints, physical synthesis, and formal verification.
- Contribute to clock tree optimization, routing, extraction, and timing closure tasks.
- Perform DFT and signal-integrity analysis for mixed-signal IP and subsystems.
- Support physical verification and design-for-manufacturability (DFM) on test chips across technology nodes.
- Develop and optimize implementation flows in collaboration with experienced engineers.
- Gain practical experience using industry tools and methodologies (Synopsys tool exposure).
Requirements
Must-have technical skills and eligibility conditions (excluding degree requirements listed below):
- Good understanding of digital logic, high-speed clocks/timing, and signal integrity.
- Strong scripting ability in Perl, Tcl, or Python.
- Understanding of CMOS/FinFET design and layout concepts and low-power design techniques.
- Familiarity with IC design and physical implementation flows; knowledge of deep-submicron technology is desirable.
- Experience with Synopsys tools (Design Compiler, ICC/ICC2/FC, PrimeTime SI, Star-RCXT, RedHawk, ICV, etc.) is a plus.
Education Requirements
B.E. / B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or related fields. Fresh graduates from the class of 2024 or 2025 only; candidates must not be currently enrolled in M.Tech or postgraduate diplomas and must not be employed in full-time positions (limited internship experience acceptable).
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
