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ASIC Package Design Engineer

Broadcom
October 23, 2026
Full-time
On-site
San Jose, California, United States
$143,800 - $230,000 USD yearly
Physical Design Jobs, Level - Senior

Job Title

ASIC Package Design Engineer

Role Summary

Experienced IC package-design engineer responsible for flip-chip BGA packages supporting high-speed SerDes, high-power delivery, HBM, DDR5, ADC/DAC and other advanced ASIC requirements. You'll join a worldwide R&D package engineering team focused on ASICs for AI, networking, HPC and 5G.

Experience Level

Senior level - role expects extensive industry experience (10+ years typical; see Education Requirements for degree and experience combinations).

Responsibilities

Design and deliver ASIC package solutions that meet signal integrity, power integrity, thermal, reliability and manufacturability targets.

  • Lead package design for SerDes, ADC/DAC, DDR, HBM and other critical interfaces.
  • Perform flip-chip BGA package layout and physical design tasks.
  • Develop solutions addressing signal integrity, power delivery, thermal and reliability concerns at package level.
  • Manage schedules and priorities across multiple (2+) concurrent projects.
  • Serve as project technical lead and customer interface for assigned designs.
  • Improve team efficiency through process development, automation, documentation and tools.

Requirements

Must-have technical skills and work conditions; preferred items called out where applicable.

  • Proven experience in flip-chip BGA package design for high-performance ASICs (years guidance in Education Requirements).
  • Strong understanding of package-level signal integrity and power integrity and ability to apply those principles to package designs.
  • Experience collaborating across time zones and coordinating co-design with internal teams and external vendors.
  • Self-management, organization, and ability to drive projects to completion.
  • On-site work required: position is expected to be in-office five days per week.
  • Preferred: experience with Cadence Allegro/Allegro Package Designer (APD) or equivalent package design tools.
  • Preferred: familiarity with Cadence SKILL or other design-automation scripting (1+ year preferred).

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) or similar field with 12+ years of relevant flip-chip BGA package-design experience; or Master of Science in Electrical Engineering (MSEE) or similar field with 10+ years of relevant experience. Fields referenced: electrical engineering or similar technical discipline. No other certifications were specified in the posting.


About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

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Date Posted: 2026-10-19