ASIC/FPGA Design Verification Engineer, Senior
QualcommJob Title
ASIC/FPGA Design Verification Engineer, Senior
Role Summary
Senior verification engineer responsible for architecting and delivering verification for ASIC and FPGA IP used in high-speed transport and compute interfaces. Works on verification environment development, test planning, executing RTL tests, tracking issues, and collaborating with internal and external stakeholders to deliver production-quality IP.
Experience Level
Senior. Typical background: MSc/MEng with 5+ years or BSc/BEng with 7+ years of ASIC/FPGA development, verification, validation, integration, or related experience.
Responsibilities
Primary duties include ownership of verification activities for IP blocks and mentoring junior engineers.
- Architect, develop and document verification environments using SystemVerilog and UVM.
- Define and execute test plans and individual test cases against RTL.
- Deliver standards-compliant IP blocks for OTN, Ethernet, CXL, PCIe, UALink, UEC, or similar.
- Lead ASIC or FPGA verification projects and streamline development with tools and scripting.
- Report, track and drive bug resolution from inception to closure.
- Collaborate with external customers and internal teams to verify and validate designs.
- Mentor and coach junior engineers.
Requirements
Must-have technical skills and experience for the role.
- Practical experience with Verilog and SystemVerilog.
- Experience building verification environments with SystemVerilog + UVM.
- Strong knowledge of randomized and directed verification methodologies.
- Familiarity with simulation tools and issue tracking.
- Experience with Unix/Linux shell scripting.
- Experience with source code revision systems (examples listed: SVN, CVS, RCS).
- Good communication, attention to detail, analytical/problem-solving skills, and ability to work independently.
Nice-to-have:
- Experience with OTN/Ethernet transport systems, CXL, PCIe, UALink/UEC.
- Experience with debugging tools and languages such as Perl, TCL, Python, and C/C++.
Education Requirements
Degree required: Bachelor's, Master's, or PhD in Science, Engineering, or a related field. Typical senior-level guidance: MSc/MEng with 5+ years or BSc/BEng with 7+ years of relevant ASIC/FPGA development, verification, validation, or integration experience. (Source lists Bachelor's, Master's, and PhD as acceptable credentials.)
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
