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ASIC/FPGA Design and Verification Engineer - Space Electronics (Mountain View)

Boeing
October 13, 2026
Full-time
On-site
Mountain View, California, United States
RTL Design Jobs, Level - Entry or Early Career

Job Title

ASIC/FPGA Design and Verification Engineer - Space Electronics (Mountain View)

Role Summary

Join Boeing Electronic Products to design and verify digital ASICs and FPGAs used across space, avionics, and other Boeing systems. Engineers on this team implement RTL, integrate DSP and third-party IP, and verify designs through simulation and hardware validation.

The role supports development from micro-architecture and HDL coding through timing closure and hardware integration. Candidates will collaborate with system and algorithm teams and work on high-reliability, high-performance ICs for flight and space programs.

Experience Level

Open to multiple levels: Associate (Level 2), Experienced (Level 3), and Lead (Level 4).

Typical experience guidance: Associate ~2+ years; Experienced ~5+ years; Lead ~9–10+ years.

Responsibilities

Primary responsibilities include digital design, verification, and hardware validation for ASIC and FPGA projects.

  • Develop RTL for ASICs/FPGAs and implement micro-architecture through gate-level netlists for ASICs.
  • Integrate DSP and third‑party IP and support system-level hardware integration.
  • Perform static timing analysis, linting, CDC checks, logic equivalence checks (LEC), and other signoff tasks.
  • Create self-checking, reusable testbenches using OOP concepts and UVM; build drivers, monitors, sequencers, and scoreboards.
  • Develop functional coverage models and drive code coverage closure in simulation.
  • Support FPGA prototyping and validate designs with hardware test-beds and special test equipment.
  • Work closely with cross-functional teams to meet schedule and quality targets.

Requirements

Key must-have and preferred qualifications for candidates. Degree information is listed below under Education Requirements.

  • Must-have: U.S. Person (U.S. Citizen, lawful permanent resident, refugee, or asylee) and ability to obtain an interim and/or final U.S. Secret security clearance.
  • Must-have: Experience with ASIC/FPGA design or verification and hands-on RTL coding (Verilog, VHDL, SystemVerilog).
  • Must-have: Ability to work 100% onsite at the listed location; employer will not sponsor employment visas.
  • Nice-to-have: Experience with hardware emulators (e.g., Palladium) and FPGA prototyping.
  • Nice-to-have: Proficiency with verification languages and assertions (SystemVerilog, SVA), functional coverage, and code-coverage closure.
  • Nice-to-have: Experience with high-speed SerDes interfaces (JESD204C, PCIe, Ethernet), scripting (Make, Perl, Python), revision control (svn, git), and Linux environments.
  • Nice-to-have: Familiarity with space design techniques and radiation mitigation; demonstrated history of first-pass ASIC success.
  • Other: Candidates must satisfy Boeing's Conflict of Interest assessment and drug-free workplace requirements; relocation may be offered based on eligibility.

Education Requirements

Required: Bachelor's degree (or non-US equivalent) in Engineering (electrical, mechanical, aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent experience. Master's degree in EE, Computer Engineering/Science, or a related field is preferred for higher-level roles. ABET accreditation preferred where applicable; equivalent combinations of education and experience are acceptable.


About the Company

Company: Boeing

Headquarters: Arlington, Virginia, United States

Large U.S. aerospace and defense company that designs, manufactures, and services commercial airplanes, military aircraft, satellites, and related systems and services worldwide.

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Date Posted: 2026-10-13