ASIC Engineer, Power

Job Title

ASIC Engineer, Power

Role Summary

Join Meta's EDA Infrastructure team to develop and maintain power analysis and optimization flows for custom silicon. The role focuses on accurate power modeling, reducing power consumption, and improving power signoff confidence across RTL-to-GDSII flows.

Experience Level

Mid-level — typically requires 6+ years of experience in ASIC design or physical design with a focus on power analysis, optimization, or signoff.

Responsibilities

Primary responsibilities include building and improving power analysis flows, collaborating across design teams, and driving power-closure methodology improvements.

• Develop and maintain power analysis flows: dynamic/static estimation, vectorless analysis, and power intent verification.
• Define and implement power methodology for RTL, synthesis, and physical design stages.
• Identify and resolve power hotspots with RTL, physical design, and verification teams.
• Build and optimize EDA infrastructure scripts and automation to improve signoff accuracy and turnaround.
• Evaluate and integrate commercial and internal EDA tools into power analysis flows.
• Author and validate power intent specifications using UPF or CPF across the design flow.
• Establish power budgets, track power metrics across milestones, and report risks to stakeholders.
• Analyze results across tape-outs to drive continuous improvement in power closure methodologies.
• Provide technical guidance on power analysis best practices and debug techniques.
• Work with EDA vendors to evaluate capabilities and influence tool roadmaps.

Requirements

Must-have technical skills and experience for successful candidates.

• 6+ years of ASIC or physical design experience with a focus on power analysis, optimization, or signoff.
• Experience developing or maintaining EDA power analysis flows using tools such as Synopsys PrimePower, Cadence Voltus, or equivalent.
• Practical experience with power intent specification usage and verification across RTL-to-GDSII flows.
• Scripting skills in Python, Tcl, or shell to build and automate EDA workflows.
• Proven ability to collaborate effectively with RTL, physical design, and verification teams to achieve power closure.
• Strong understanding of power analysis and optimization techniques and EDA tool methodologies.
• Excellent communication skills for cross-functional coordination and reporting.
• Nice-to-have: experience establishing power budgets/metrics, integrating internal EDA tools, vendor engagement, and analyzing multiple tape-outs for systemic improvements.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.