ASIC Engineer, Infrastructure Silicon Validation

Job Title

ASIC Engineer, Infrastructure Silicon Validation

Role Summary

Principal-level ASIC engineer defining and driving post-silicon validation strategy for Meta's custom infrastructure ASICs (compute accelerators, network ASICs, storage controllers). Responsible for silicon bring-up, functional validation, performance characterization, and post-silicon debug to meet hyperscale reliability and performance requirements.

Experience Level

Senior - requires 15+ years of experience in post-silicon validation, silicon bring-up, or ASIC characterization.

Responsibilities

Lead and execute end-to-end post-silicon validation and bring-up across multiple ASIC programs; collaborate with cross-functional teams and vendors; mentor engineers and represent validation in technical reviews.

• Define and own long-term post-silicon validation strategy and readiness criteria for tape-out, first silicon, and production qualification.
• Architect scalable validation frameworks for functional verification, performance characterization, and reliability qualification in data center environments.
• Lead silicon bring-up activities: power-on sequencing, clock/reset validation, memory interface bring-up, and high-speed SerDes characterization.
• Drive root-cause analysis and post-silicon debug using lab instrumentation, logic analyzers, oscilloscopes, and diagnostic firmware.
• Collaborate with pre-silicon design and verification teams to ensure testability, DFT coverage, and scan chain integrity.
• Partner with system software, firmware, and platform teams to develop diagnostic tools and automated test suites for silicon characterization.
• Provide post-silicon feedback to influence architecture and improve first-pass silicon success rates.
• Mentor validation engineers and promote best practices in debug, test automation, and characterization methodology.

Requirements

Must-have technical skills and program experience. Preferred items listed separately.

• 15+ years of experience in post-silicon validation, silicon bring-up, or ASIC characterization for complex custom ASICs.
• Proven experience defining and executing validation strategies for high-speed interfaces (PCIe, DDR, HBM, Ethernet, custom SerDes at multi-Gbps).
• Strong expertise with DFT methodologies applied to post-silicon debug and production test (scan, BIST, JTAG, boundary scan).
• Experience leading multi-generational validation programs from tape-out through production qualification in hyperscale or high-volume environments.
• Skilled in root-cause analysis and debug using lab equipment and custom diagnostic firmware.
• Experience developing automated silicon characterization and regression frameworks using Python, Tcl, or equivalent scripting.
• Proven ability to collaborate across design, firmware, software, and foundry/IP vendors to deliver silicon readiness.

Nice-to-have:

• Developed reusable silicon validation IP or test infrastructure spanning multiple programs.
• Experience with foundry collaboration on process failure analysis, yield improvement, and reliability for advanced nodes.
• Familiarity with formal verification, emulation platforms, or pre-silicon simulation and correlation to post-silicon results.
• Experience validating silicon under production data-center workloads including thermal, power-integrity, and signal-integrity characterization.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.