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ASIC Engineer, Formal Verification

Meta Platforms
October 5, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Entry or Early Career

Job Title

ASIC Engineer, Formal Verification

Role Summary

Formal Verification Engineer on the Infrastructure team developing formal verification solutions for IP and SoC used in data center applications. Responsible for creating formal test plans, building reusable formal environments, and driving formal verification sign-off for single or multiple complex blocks.

The role requires cross-functional collaboration with architecture, RTL design, emulation, software and post-silicon teams to achieve first-pass silicon success.

Experience Level

Entry-level. Minimum 2 years of formal verification experience is required.

Responsibilities

Key responsibilities include defining methodology, building environments, and driving verification to sign-off.

  • Propose, implement and promote formal verification methodology at block and top levels.
  • Work with architecture and design teams to develop formal verification specifications and implementations.
  • Define formal verification scope, create formal environments, and close coverage using targeted techniques at IP, subsystem and SoC levels.
  • Build reusable, scalable formal environments and automation for tool deployment.
  • Evaluate and recommend EDA and formal verification tool solutions.

Requirements

Must-have skills and experience followed by preferred qualifications.

  • 2+ years of formal verification experience, including datapath, sequential equivalence, Xprop, clock gating, and connectivity verification.
  • Experience with formal verification methodologies, complexity-reduction and abstraction techniques.
  • Fluency in hardware description and assertion languages such as SystemVerilog and SVA.
  • Proficiency in scripting languages (Python, Perl, or Tcl) for automation.
  • Experience partnering with architecture, design, and validation teams to define scope and drive sign-off.
  • Experience with formal tools such as JasperGold or VC-Formal.

Nice-to-have:

  • Property verification experience for complex compute blocks (DSP, CPU, GPU, or accelerators).
  • Experience with simulators, waveform debugging tools, and interpreting hardware specifications to extract properties.
  • Experience with complex SoCs, clock domain crossing, IP-XACT based register verification, low-power verification, and end-to-end automated flows from specification to verified designs.

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience.


About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.

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Date Posted: 2026-10-05