ASIC Digital Verification Engineer
Join a verification team in Ottawa focused on mixed-signal digital PLL ASICs. The role centers on developing self-checking testcases, executing verification plans, analyzing coverage results, debugging simulations, and improving the verification environment and infrastructure.
The position works closely with local and remote design and verification engineers to achieve verification closure using modern methodologies and tools.
Entry-level; up to 2 years of relevant experience.
Key responsibilities include planning and executing verification tasks and improving verification infrastructure and processes.
Must-have technical skills and attributes; nice-to-have items noted separately.
Bachelor's degree (entry level, up to 2 years of experience) or a recent Master's degree — master’s graduates with no experience are considered. No specific field of study was listed.
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
