ASIC Digital Design Sr/Staff Engineer
SynopsysJob Title
ASIC Digital Design Sr/Staff Engineer
Role Summary
Senior RTL engineer on the High Bandwidth Memory (HBM) PHY RTL team responsible for developing production-quality RTL for memory interface IP. Work spans digital, mixed-signal, and physical implementation, collaborating with analog, mixed-signal, and physical design teams across global sites.
Primary mission: deliver high-performance, low-power, silicon-validated RTL implementations that meet architectural and industry-standard specifications for HBM PHY IP.
Experience Level
Senior — typically 7–10 years of hands-on ASIC/RTL design experience (experience range specified in the source).
Responsibilities
Core responsibilities include RTL design, cross-functional integration, and support through silicon debug and production release.
- Develop and deliver SystemVerilog/Verilog RTL for HBM PHY IP.
- Translate architecture and industry standard specifications into robust RTL implementations.
- Collaborate with analog, mixed-signal, and physical design teams to ensure integration and performance.
- Address timing-closure, low-power, and high-speed physical implementation challenges.
- Create clear specification documents and provide technical guidance across teams.
- Automate design and verification tasks using scripting languages to improve efficiency.
- Support the full ASIC/IP flow from concept through silicon debug and production release.
Requirements
Must-have technical skills and experience; preferred items listed separately.
- 7–10 years of hands-on RTL design experience with high-speed digital and mixed-signal interfaces.
- Proven experience in SystemVerilog and Verilog for RTL development.
- Strong background in high-speed design, timing closure, and low-power techniques.
- Experience across the ASIC/IP development flow including DFT/DFM and hardware debug.
- Proficiency in scripting for automation (Python, Perl, TCL or similar).
- Ability to model mixed-signal interactions and to address physical implementation challenges.
- Strong technical writing and cross-team communication skills.
- Preferred: experience with physically aware synthesis, DDR/HBM DRAM, and UCIe technologies.
Education Requirements
Not specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
