ASIC Digital Design, Sr Staff Engineer
SynopsysJob Title
ASIC Digital Design, Sr Staff Engineer
Role Summary
This is a Senior Staff Engineer role within Synopsys' ASIC Digital Design team based in Mississauga, ON, Canada. The posting identifies the role and location but does not provide a detailed job overview.
Experience Level
Senior - title indicates a senior/staff level role. Years of experience not specified.
Responsibilities
Specific responsibilities were not listed in the source. Typical responsibilities for this role may include:
- Lead or contribute to digital ASIC architecture and RTL design.
- Develop, review, and optimize RTL code and design constraints.
- Drive timing closure, synthesis, and coordinate with physical design teams.
- Collaborate with verification, DFT, and validation teams to ensure silicon readiness.
- Mentor and provide technical leadership to engineering team members.
- Interface with cross-functional stakeholders and manage technical risks.
Requirements
Required qualifications were not specified in the source. Common expectations for similar positions include:
- Proven experience in ASIC digital design and delivery at a senior level.
- Proficiency with RTL (Verilog/SystemVerilog) and industry EDA flows.
- Experience with synthesis, timing analysis, and DFT concepts.
- Strong problem-solving, communication, and leadership skills.
Education Requirements
Not specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
