ASIC Digital Design Senior Engineer

Job Title

ASIC Digital Design Senior Engineer

Role Summary

The role is an ASIC digital design position on the UCIe Controller IP team focused on implementing timing-aware RTL modules for high-performance computing applications. The engineer will work with architecture, verification, and physical design to deliver synthesis-ready designs that meet performance, area, and power targets.

Experience Level

Senior. The posting indicates 2–3 years of ASIC digital design experience as guidance.

Responsibilities

Primary responsibilities include ownership of RTL modules from microarchitecture through synthesis-ready implementation and cross-team collaboration to meet product targets.

• Design and own RTL modules for UCIe Controller IP from specification through synthesis-ready implementation.
• Tune designs to meet timing, power, and area targets across process nodes using synthesis and timing feedback.
• Develop and maintain design automation scripts (Python, Tcl, Perl) for flow integration and design generation.
• Participate in and contribute to design reviews and team methodology improvements.
• Analyze specification changes, assess impact on design and schedule, and propose practical mitigation paths.
• Debug issues methodically and follow fixes through verification and sign-off.

Requirements

Must-have technical skills and experience required for the role; preferred items noted separately.

• 2–3 years of ASIC digital design experience with ownership of RTL modules in production or near-production silicon.
• Strong Verilog skills for timing-critical designs and proven ability to structure RTL for timing and power goals.
• Hands-on experience with synthesis, static timing analysis, and power optimization.
• Working proficiency in scripting for design automation (Python, Tcl, or Perl).
• Ability to interpret synthesis/timing/power results and modify RTL or microarchitecture accordingly.
• Clear communication skills for coordination with architects, verification, and physical design teams.
• Nice-to-have: experience with controller IP or high-speed interfaces.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field (as stated in the posting).

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.