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ASIC DFT Technical Leader

Cisco Systems
August 09, 2026
Full-time
On-site
Austin, Texas, United States
$186,900 - $267,700 USD yearly
DFT Jobs, Level - Senior

Job Title

ASIC DFT Technical Leader

Role Summary

Lead DFT (design-for-test) architecture, requirements, and execution for ASICs in the Silicon One development organization. Work cross-functionally with front-end RTL, backend physical design, verification, and validation teams to ensure testability throughout implementation and post-silicon phases.

The role sits in the Common Hardware Group, which develops hardware platforms for Cisco's switching, routing, and wireless products.

Experience Level

Senior β€” minimum 10 years of relevant industry experience is required.

Responsibilities

Primary responsibilities include defining and delivering DFT strategy across the chip development lifecycle.

  • Define DFT requirements and test architectures early in the design cycle in collaboration with RTL and physical design teams.
  • Drive DFT implementation and quality processes through synthesis, place-and-route, timing signoff, and gate-level stages.
  • Lead post-silicon validation and debug efforts, including creation and use of ATE patterns and DFT-based test flows.
  • Coordinate ATPG flows and DFT tool usage; support gate-level simulation and failure analysis.
  • Mentor engineers and coordinate with cross-functional teams to integrate custom DFT IP and verify test-timing.

Requirements

Key technical must-haves and useful additions.

  • Must-have: Proven experience in DFT, test, and silicon engineering; strong knowledge of JTAG, scan chains, BIST (including memory BIST) and boundary-scan techniques.
  • Must-have: Hands-on experience with ATPG and EDA tools such as TestMax, Tetramax, Tessent tool sets, and PrimeTime.
  • Must-have: Gate-level simulation and debugging experience with tools like VCS; post-silicon validation and debug experience; familiarity with ATE patterns and P1687.
  • Nice-to-have: Verilog experience for custom DFT logic and IP integration; DFT CAD development, methodology, and infrastructure experience.
  • Nice-to-have: Test static timing analysis (Test STA) and SystemVerilog skills for logic equivalency and test-timing validation.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering is required.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-08-08