ASIC DFT Engineering Technical Leader

Job Title

ASIC DFT Engineering Technical Leader

Role Summary

Work as an ASIC Implementation Technical Lead within Cisco Silicon One, focusing on Design-for-Test (DFT). Collaborate with front-end RTL, backend physical design, and multi-functional teams to define and integrate DFT features across implementation and post-silicon validation.

Lead development of DFT IP, enable testability, and drive debug and quality processes for high-complexity networking ASICs.

Experience Level

Senior - minimum 12 years of relevant ASIC/DFT experience.

Responsibilities

Primary responsibilities include designing and integrating DFT features, coordinating across teams, and supporting post-silicon validation.

• Define and implement hardware DFT features for ATE, in-system test, debug, and diagnostics.
• Develop and integrate reusable DFT IP with RTL and full-chip design flows.
• Collaborate with physical design and RTL teams to enable test logic integration and validation through implementation and post-silicon phases.
• Drive DFT strategies for new device models (bare die, stacked die) and guide test/debug methodology.
• Lead troubleshooting and root-cause analysis with minimal supervision.
• Participate in physical design signoff activities related to testability and test timing.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Minimum 12+ years of ASIC DFT or related silicon engineering experience.
• Expertise in JTAG, scan, and BIST architectures (including memory BIST and boundary scan).
• Experience with ATPG and EDA tools such as TestMax, Tetramax, and Tessent toolsets; familiarity with PrimeTime for test-timing validation.
• Verification skills: SystemVerilog logic equivalency checks and test-timing validation.
• Gate-level simulation and debugging experience (e.g., VCS).
• Post-silicon validation and debug experience; exposure to ATE patterns and P1687.
• Scripting proficiency: Tcl and Python or Perl.
• Strong verbal communication and cross-functional collaboration skills.
• Nice-to-have: Verilog design for DFT IP, DFT CAD development (architecture, methodology, infrastructure), and static timing analysis.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering required; posting specifies degree requirement alongside at least 12 years of experience.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).