ASIC DFT Engineer

Job Title

ASIC DFT Engineer

Role Summary

The ASIC DFT Engineer will define and implement design-for-test (DFT) features for high-performance networking ASICs within the Silicon One development organization. The role partners with front-end RTL and backend physical design teams to drive testability, integration, and post-silicon validation across the implementation flow.

Experience Level

Senior — requires 7+ years of relevant experience.

Responsibilities

Primary responsibilities include specifying, implementing, and validating DFT features across design and silicon phases.

• Design and implement DFT features for ATE, in-system test, debug, and diagnostics.
• Develop reusable DFT IP and integrate testability features into full-chip RTL.
• Collaborate with front-end design, design-verification, and physical-design teams to enable integration and validation of test logic during implementation and post-silicon flows.
• Participate in DFT and physical-design strategies for new device models (bare die, stacked die) and drive reusable test/debug approaches.
• Lead DFT and quality processes through implementation, signoff, and post-silicon validation, including ATE pattern usage and debugging.
• Troubleshoot and debug test and silicon issues with minimal mentorship.

Requirements

Must-have technical skills and experience.

• At least 7 years of experience in DFT, test, or silicon engineering.
• Hands-on experience with JTAG protocols, scan and BIST architectures (including memory BIST and boundary scan).
• Experience with ATPG and commercial EDA/DFT toolsets (examples: TestMax, Tetramax, Tessent, PrimeTime).
• Gate-level simulation and debugging experience using simulators such as VCS.
• Post-silicon validation and debug experience, including working with ATE patterns and standards such as P1687.

Nice-to-have / preferred:

• Verilog/SystemVerilog design experience for custom DFT logic and IP integration.
• DFT CAD development, test architecture, methodology, and infrastructure experience.
• Test static timing analysis and test-timing validation skills.
• Familiarity with functional verification and logic equivalency checking.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering is required. The role specifies this degree requirement together with at least 7 years of relevant experience.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).