ASIC Design Verification Engineer (Security Group) - Sr Staff

Job Title

ASIC Design Verification Engineer (Security Group) - Sr Staff

Role Summary

Validate subsystem and SoC-level micro-architectures for security-related IP and subsystems. Work with chip architects to design verification methodology, implement testbenches and environments, run regressions, debug failures, and ensure designs are launch-ready.

Position is within the ASICS Engineering team and contributes to pre-silicon verification, coverage closure, and silicon bring-up activities.

Experience Level

Senior (Sr Staff). The posting indicates 10+ years of SoC-level verification experience and expects independent work with responsibility for guiding other engineers.

Responsibilities

Key responsibilities include planning and executing verification for a defined functional domain and ensuring coverage and quality targets are met.

• Collaborate with subsystem and SoC architects to derive verification requirements and detailed test plans.
• Develop verification methodology that is scalable and portable across environments.
• Implement verification environments: stimulus, checkers, monitors, assertions, and coverpoints.
• Create and maintain testbenches, transactors, and portable test infrastructure.
• Execute regressions, perform design and DV environment bring-up, and debug test failures.
• Run and analyze coverage reports, identify coverage holes, and update test plans to close gaps.
• Track and report DV progress using metrics such as bugs and coverage; write technical documentation and review junior engineers' work.
• Support pre-silicon and post-silicon validation and participate in technical reviews.

Requirements

Must-have engineering skills and tools for evaluating complex SoC/subsystem designs. Preferred items listed separately.

• Must-have: Strong SystemVerilog and UVM experience.
• Must-have: Experience with Synopsys VCS/Verdi and assertion-based verification.
• Must-have: Functional coverage implementation and analysis.
• Must-have: SoC-level verification experience, including debugging ARM-based or RISC-V processors and understanding APB/AHB/AXI protocols.
• Must-have: Scripting and automation skills: Python (and/or Perl), Makefile automation, and basic UNIX command proficiency.
• Must-have: Ability to develop verification plans, testbenches, and run regressions.
• Nice-to-have: Experience with cryptographic algorithms, formal methods, silicon bring-up, gate-level simulation, and mixed-signal verification.
• Nice-to-have: Knowledge of memory organization, error detection/correction schemes, cross-clock domains, clock gating, NoC and micro-architecture details.

Education Requirements

Minimum qualifications: Bachelor's degree in Science, Engineering, or related field with 6+ years of relevant ASIC design/verification experience; OR Master's degree in Science, Engineering, or related field with 5+ years; OR PhD in Science, Engineering, or related field with 4+ years. Fields noted: science or engineering disciplines. (The posting separately indicates an overall expectation of ~10+ years of SoC verification experience for the role level.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.