ASIC Design Verification Engineer - Display (up to Staff)

Job Title

ASIC Design Verification Engineer - Display (up to Staff)

Role Summary

Join the display design team as an ASIC Design Verification engineer focused on verification of next-generation display processors for mobile, compute, automotive, and IoT products. You will work on multi-site, cross-functional teams to develop verification plans, testbenches, and automated flows using industry-standard methodologies.

Experience Level

Senior-level. Experience guidance from the posting: typical requirements were Bachelor's +4 years, Master's +3 years, or PhD +2 years of relevant ASIC design/verification/validation/integration experience.

Responsibilities

Primary duties include planning and executing verification activities across block and subsystem levels, supporting debug, and automating verification flows.

• Contribute to feature, core and subsystem verification using C/RTL and gate-level simulations.
• Define verification requirements with design teams to ensure functional, performance and power correctness.
• Develop and execute test plans; drive verification closure.
• Create and maintain testbenches, assertions, and functional coverage models.
• Implement and maintain flows to automate development and verification processes.
• Participate in debug activities throughout the development cycle and write technical documentation.
• Collaborate across hardware and software teams to meet system requirements.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Strong analytical and debugging skills; attention to detail and ability to prioritize tasks.
• Proficient in C/C++ and familiar with object-oriented programming concepts.
• Experience with hardware verification languages: SystemVerilog UVM and/or SystemC for testbench development.
• Experience with HDLs: Verilog and SystemVerilog for RTL-level work.
• Solid understanding of digital circuits and event-driven simulators; experience with RTL and gate-level simulations.
• Familiarity with scripting and build tools: Perl, Python, TCL, tcsh, and GNU Make.
• Strong written and verbal communication skills for conveying complex technical information.
• Ability to implement and maintain automated verification flows and tooling.
• Nice-to-have: experience with display subsystems (pixel processing, MIPI DSI, DisplayPort, HDMI), bus/interconnect protocols (AHB, AXI), EDA flows (RTL-to-GDS, Virtuoso), and experience developing assertions and coverage models.

Education Requirements

Degree requirement options listed in the posting: Bachelor's degree in Science, Engineering, or a related field with 4+ years of relevant ASIC/verification/validation/integration experience; OR Master's degree in Science, Engineering, or related field with 3+ years; OR PhD in Science, Engineering, or related field with 2+ years. Equivalent practical experience acceptable per posting language.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.