ASIC Design Verification Engineer

Job Title

ASIC Design Verification Engineer

Role Summary

Lead the verification effort for complex ASIC and FPGA projects, owning verification strategy, plans, and execution from inception to delivery. Work closely with architects, digital and analog design teams, CAD, and physical verification groups to ensure functional and performance requirements are met.

Primary workplace is in the St. Paul, MN area with a hybrid schedule and occasional travel for project meetings or customer engagements.

Experience Level

Senior — 10+ years of relevant ASIC design verification experience.

Responsibilities

Core responsibilities include planning, implementing, and validating verification for ASIC/FPGA designs.

• Define and own verification methodologies, verification plans, and environments to ensure comprehensive coverage.
• Develop verification components including testbenches, directed and constrained-random tests, and assertion-based verification IP.
• Plan and execute verification campaigns; track coverage and quality metrics.
• Perform complex debugging and root-cause analysis of functional and performance issues.
• Collaborate with architects, RTL designers, analog teams, CAD, and physical verification to align verification with design intent.
• Mentor and provide technical leadership to junior verification engineers.
• Monitor industry tools and methodologies and drive continuous improvements in verification practice.

Requirements

Summary of must-have and preferred skills for successful candidates.

• Must-have: 10+ years of hands-on experience in ASIC design verification, including development of verification environments and testbenches for complex ASICs and FPGAs.
• Must-have: Strong proficiency in assertion-based verification, testbench development, coverage-driven verification, and debug/root-cause analysis.
• Must-have: Demonstrated leadership and mentoring experience for verification teams.
• Must-have: Ability to collaborate cross-functionally with architects, digital and analog designers, CAD, and physical verification teams.
• Must-have: US citizenship and ability to obtain/maintain a US government security clearance.
• Nice-to-have: Experience verifying high-speed interfaces (PCIe, DDR, UCIe), AI/ML accelerators, complex data-processing pipelines, or processor-based designs.
• Nice-to-have: Familiarity with formal verification techniques and tools; experience in networking or automotive ASIC verification.

Education Requirements

Bachelor's degree in computer engineering, electrical engineering, or a related technical field is required. A Master’s degree in a related field is preferred.

About the Company

Company: ForwardEdge ASIC

Engineering company focused on ASIC and FPGA design and verification, providing verification strategy, testbench development, and technical leadership for complex high-performance chip designs. Supports projects requiring US government security clearances.