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ASIC Design Engineer (Silicon Engineering)

SpaceX
October 13, 2026
Full-time
On-site
Palo Alto, California, United States
$135,000 - $210,000 USD yearly
ASIC Design Jobs, Level - Entry or Early Career

Job Title

ASIC Design Engineer (Silicon Engineering)

Role Summary

Design and implement ASICs and FPGAs for Starlink systems, working across architecture, firmware, validation, and implementation teams. The role covers microarchitecture, RTL development, integration, lab bring-up and on-orbit validation for communications and DSP subsystems.

Experience Level

Entry-level - 1+ years of relevant experience (RTL design).

Responsibilities

Work through the full ASIC/FPGA lifecycle and collaborate with cross-functional teams to deliver production silicon and supporting systems.

  • Develop RTL for SoC blocks and integration using SystemVerilog/Verilog (or VHDL).
  • Optimize designs for power, performance, and area.
  • Participate in architecture, microarchitecture and design partitioning discussions.
  • Collaborate with backend/implementation teams and support lab bring-up and validation.
  • Design test systems and validation strategies for lab and on-orbit verification.
  • Build tooling and data-analysis flows to improve designs from lab and orbital data.
  • Work with software/firmware teams to integrate production software for your designs.

Requirements

Key technical and eligibility requirements. Education requirements are listed separately below.

Must-have:

  • 1+ years of RTL design experience using SystemVerilog, Verilog, or VHDL.
  • Practical experience across the ASIC/FPGA design and verification flow (RTL through bring-up).
  • Ability to collaborate with cross-disciplinary teams (systems, firmware, validation, backend).
  • Authorization to work in the United States per ITAR (U.S. citizen, lawful permanent resident, refugee, or asylee).
  • Willingness to work extended hours or weekends as needed for mission-critical deadlines.

Nice-to-have:

  • ASIC/FPGA system integration experience.
  • Proficiency in Python, C/C++, and Bash.
  • Experience designing DSP or digital communications datapaths and modem components.
  • Familiarity with EDA tools (HDL simulators such as VCS/Questa/IES, lint tools like Spyglass, FPGA tools like Vivado/Quartus).
  • Knowledge of AXI/AHB/APB protocols.
  • Experience debugging complex PCBs with oscilloscopes and spectrum analyzers.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or Physics is required. A Master’s degree in Electrical/Computer Engineering or a related field is preferred.

For ITAR details, see ITAR information.


About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.

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Date Posted: 2026-10-13