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ASIC Design Engineer II

Ambarella
October 20, 2026
Full-time
On-site
Santa Clara, California, United States
$130,000 - $160,000 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

ASIC Design Engineer II

Role Summary

Design and implement RTL for video, image-processing, vector, neural-network accelerators, processor cores, and memory subsystems for edge AI vision processors. Work on front-end RTL design, synthesis optimization, and support chip bring-up and validation within a cross-functional SoC team.

Experience Level

Mid-level. The posting expects 0–5 years of relevant experience.

Responsibilities

Primary engineering responsibilities include RTL design, verification collaboration, and implementation optimization.

  • Design and implement modules using Verilog and SystemVerilog (video compression, image processing, vector and neural accelerators, processor cores, memory subsystems).
  • Perform logic design, RTL implementation, and verification using Verilog/SystemVerilog and scripting languages.
  • Synthesize and optimize RTL for performance, area, and power.
  • Develop and improve front-end design methodologies and tool flows.
  • Support chip bring-up, validation, and debug activities.
  • Analyze code and functional coverage metrics; collaborate with verification to close coverage gaps.

Requirements

Must-have technical skills, followed by useful but optional skills.

  • Must-have: Proficiency in SystemVerilog and Verilog for RTL design and verification.
  • Must-have: Practical experience with scripting languages (Perl required; other scripting languages expected).
  • Must-have: Solid understanding of computer architecture, logic design, and VLSI design principles.
  • Must-have: Familiarity with design verification methodologies and functional coverage concepts.
  • Must-have: Ability to write assembly language programs and work with low-level software for bring-up.
  • Nice-to-have: Experience with logic synthesis, timing closure, and RTL optimization for power/area/performance.
  • Nice-to-have: Prior experience with video compression, image processing, or neural-network accelerator design.
  • Strong communication skills and a collaborative, team-oriented mindset.

Education Requirements

Master's degree in Electrical, Electronics, or Computer Engineering is specified. The posting expects 0–5 years of relevant experience. No alternative "equivalent experience" language was provided.


About the Company

Company: Ambarella

Headquarters: Santa Clara, California, USA

Ambarella is a leader in computer vision and video processing technology, providing advanced solutions that enhance the performance of video applications. Focused on quality and innovation, Ambarella develops products for diverse uses, including autonomous vehicles, surveillance systems, and smart cameras, aiming to deliver pristine imagery and efficient compression while minimizing power consumption.

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Date Posted: 2026-10-13