ASIC Design Engineer, BOOT and Power Management
Responsible for RTL design and micro-architecture of BOOT and power-management subsystems for automotive and client SoCs. The role covers architecture trade-offs, RTL implementation, verification coordination, timing closure and silicon validation in a cross-functional engineering team.
Entry-level. The posting specifies approximately 2+ years of relevant industry experience.
Key responsibilities include:
Must-have skills and attributes:
Requires BTech or MTech. The posting specifies approximately 2+ years of industry experience. No specific field of study or certifications were listed.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
