ASIC Backend Customer Support Engineer

Job Title

ASIC Backend Customer Support Engineer

Role Summary

Provide post‑sales technical support for ASIC backend implementation to global customers, acting as the technical liaison between customers and internal engineering teams. The role focuses on diagnosing and resolving physical design issues, stabilizing projects, and improving customer workflows and satisfaction.

Experience Level

Mid-level — typically requires around 5+ years of relevant ASIC physical design or backend customer support experience.

Responsibilities

Primary responsibilities include customer support, troubleshooting, and cross‑team collaboration across the full ASIC backend flow.

• Provide technical support across the backend flow: floorplanning, placement, routing, CTS, timing closure, power integrity analysis, and DRC/LVS/ERC.
• Troubleshoot timing violations, IR drop, DRC/LVS errors, tool crashes, and flow bottlenecks; perform root‑cause analysis and propose fixes.
• Escalate and coordinate high‑priority issues with internal backend R&D, design engineering, and product teams to drive resolution.
• Review customer design constraints and project requirements; recommend best practices to optimize backend design methodology.
• Manage customer support cases: track progress, ensure timely closure, and perform post‑case follow‑up to minimize recurrence.
• Create and maintain customer‑facing documentation, troubleshooting guides, FAQs, and training materials.
• Collect customer feedback on product function and usability and communicate improvements to internal teams.
• Participate in customer technical meetings, remote workshops, and occasional on‑site support for complex issues.

Requirements

Must‑have technical skills and experience for day‑to‑day success. Preferred items are listed separately.

• Must: Minimum ~5 years hands‑on experience in ASIC physical design or backend customer support.
• Must: Proficiency with mainstream EDA tools (examples: Synopsys IC Compiler II, Cadence Innovus, PrimeTime, Calibre, StarRC).
• Must: Strong understanding of timing closure, MCMM analysis, low‑power flows (UPF/CPF), power integrity, and physical verification.
• Must: Familiarity with semiconductor process nodes and DFM concepts.
• Must: Strong analytical, debugging, and multi‑tasking abilities under tight schedules.
• Must: Fluent written and spoken English for cross‑border customer communication.
• Must: Customer‑oriented, collaborative, and self‑driven work style.
• Nice‑to‑have: Experience at EDA vendors, IP companies, or IC design service firms; scripting skills (Tcl, Python, Perl); advanced process node experience (7nm/5nm); pre‑sales or key account support; datacenter/HPC product experience.

Education Requirements

Bachelor's degree or higher in Microelectronics, Electrical/Electronics Engineering, Integrated Circuit Design, Computer Engineering, or a related technical field. Master's or PhD are acceptable. The posting also permits equivalent relevant work experience in lieu of degree requirements.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.