ASIC Architect

Job Title

ASIC Architect

Role Summary

Lead the architecture and definition of next-generation, high-performance ASICs for AI and datacenter workloads. Translate system requirements into detailed architectural specifications and guide cross-functional teams to deliver PPA-optimized silicon.

Startup environment focused on performance, scalability, and resiliency for large-scale AI data center clusters.

Experience Level

Senior-level. Requires 7+ years of experience in ASIC architecture, micro-architecture, or high-level design.

Responsibilities

Primary responsibilities include defining architecture, modeling performance, and coordinating implementation across design teams.

• Lead creation of Architectural Design Specifications (ADS) and Micro-architecture Specifications (MAS) for complex ASICs, including high-speed interconnect fabric and IO protocols (Ethernet, PCIe, UCIe).
• Develop high-level performance models (SystemC/TLM, C++, or Python) to analyze workloads and validate architectural assumptions.
• Optimize block- and chip-level architecture to meet power, performance, and area targets.
• Define advanced power management strategies (DVFS, power domains, clock gating).
• Partner with RTL design, verification, physical design, firmware, and software teams to ensure implementation and validation.
• Drive architectural trade-off studies and lead design reviews.
• Mentor junior engineers and provide technical leadership across the organization.

Requirements

Must-have technical skills, tools, and experience.

• 7+ years of experience in ASIC architecture, micro-architecture, or high-level design.
• Strong proficiency in SystemVerilog/Verilog and C/C++ or SystemC for modeling.
• Deep knowledge of computer architecture: CPU/GPU cores, caches, fabric, and memory hierarchies.
• Experience with industry-standard protocols such as Ethernet, PCIe, or UCIe.
• Familiarity with EDA tools (for example Synopsys Design Compiler, Cadence Genus, or similar).
• Experience with performance modeling and analysis tools.
• Strong communication skills and ability to lead technical discussions and reviews.

Nice-to-have:

• Experience designing AI/ML accelerators or high-performance networking silicon.
• Proven record of shipping silicon from concept to tape-out.
• Familiarity with pre-silicon emulation platforms.
• Strong scripting skills (Python, Tcl, Perl) for automation.
• Master's degree or PhD in a relevant field (listed under Education Requirements).

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science. Preferred: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science. (No alternate "equivalent experience" language was specified in the posting.)

About the Company

Company: Delos Data

Headquarters: Palo Alto, CA, United States

Stealth-mode Silicon Valley startup building foundational technology to improve performance, scalability, and resiliency of large-scale AI data center clusters. Backed by venture capital and led by experienced founders, the company develops hardware/software solutions and operates across U.S. and Canadian locations.