ASIC Architect

Job Title

ASIC Architect

Role Summary

Senior architect focused on micro-architecture and performance modeling for accelerator products. The role works with architecture, software, and performance teams to translate high-level architecture specifications into micro-architecture requirements and to evaluate performance, power, and area trade-offs.

Based in Sunnyvale, CA; role includes workload profiling, benchmarking, and identifying hardware acceleration opportunities.

Experience Level

Senior — typically 10+ years of experience in performance analysis and modeling across GPUs, CPUs, or accelerator products.

Responsibilities

Key responsibilities include:

• Translate high-level architecture specs into micro-architecture feature requirements.
• Develop and validate new features in performance and power models.
• Perform comprehensive PPA (performance, power, area) trade-offs for architectural features.
• Analyze and extract insights for micro-architecture power and efficiency improvements.
• Profile workloads, identify bottlenecks, and project competitor performance for benchmarking.
• Work with software teams to perform end-to-end application-level modeling at cluster scale.
• Identify kernel-level opportunities for hardware acceleration and micro-code optimization.

Requirements

Must-have technical skills and experience:

• 10+ years of hands-on experience in performance analysis and modeling across GPUs, CPUs, or accelerator products.
• Strong background in computer architecture and high-level architectural trade-offs.
• Proficient building performance models and analytical tooling (Python or similar environments).
• Experience with profiling workloads and identifying micro-architectural bottlenecks.
• Familiarity with micro-code (kernel) performance and optimization techniques.
• Ability to collaborate with software teams for system- and cluster-level modeling.
• Excellent quantitative analysis and communication skills to present trade-offs and benchmarking results.

Nice-to-have:

• Experience specifically profiling ML workloads and familiarity with neural network architectures.

Education Requirements

Master's or PhD in Electrical Engineering or Computer Engineering.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.