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Applications Engineering, Sr. Static Timing Analysis Staff Engineer

Synopsys
July 02, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Applications Engineering, Sr. Static Timing Analysis Staff Engineer

Role Summary

Customer-facing engineering role in Applications Engineering focused on static timing analysis (STA) and signoff using Synopsys PrimeTime. The engineer diagnoses timing closure challenges on advanced-node designs, develops automation and flows, and drives product and methodology improvements with R&D and customers.

Experience Level

Senior-level (title indicates senior/staff). Years of experience not specified.

Responsibilities

Primary responsibilities include on-site and remote customer engagements, debugging signoff issues, and producing reusable tooling and methodology.

  • Work directly with semiconductor customers to resolve timing closure and signoff challenges under tapeout schedules.
  • Debug setup/hold violations, clock domain crossings, SI-related timing failures, and variation-driven signoff problems using PrimeTime.
  • Guide customers on MMMC analysis and OCV/AOCV/POCV variation-aware timing methodologies for 5nm and below.
  • Collaborate with R&D and product engineering to reproduce issues, identify root causes, and drive tool or methodology fixes.
  • Develop reference flows and automation (Tcl; Python/Perl as needed) and produce best-practice documentation.
  • Deliver technical training, workshops, and demos to customer design teams.
  • Demonstrate and deploy proof-of-concept flows to accelerate adoption of PrimeTime signoff features.

Requirements

Must-have technical skills and experience for immediate impact with customers and internal teams.

  • Hands-on production experience with Synopsys PrimeTime for static timing analysis and signoff.
  • Deep knowledge of timing constraints (SDC), MMMC analysis frameworks, and variation-aware timing methodologies (OCV, AOCV, POCV).
  • Proven ability to debug complex timing issues, including clocking and signal integrity effects.
  • Proficiency in Tcl for automation; experience with Python or Perl is a strong plus.
  • Experience with advanced-node designs (5nm and below) and their signoff requirements.
  • Strong verbal and written communication skills and demonstrated customer-facing experience.

Education Requirements

Bachelor's degree in Electronics and Communication Engineering plus a Master's degree in VLSI, Embedded Systems, or Communication Systems (both degrees specified in the posting). No alternative "equivalent experience" language was provided.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-07-01