Applications Engineering, Senior Engineer

Job Title

Applications Engineering, Senior Engineer

Role Summary

Provide technical field support for Synopsys Zebu emulation and Protocompiler prototyping products. Work with global customers to migrate designs to new releases, debug multi-FPGA partitioning and synthesis/place-and-route issues, deploy new features on live designs, and deliver technical training.

Member of the Hardware Assisted Verification (HAV) team within the Technical Sales Group, collaborating with R&D and customer engineering teams across the verification and prototyping lifecycle.

Experience Level

Senior. The posting includes degree-tied experience guidance (see Education Requirements) but the role expects independent, expert-level FPGA/emulation troubleshooting and customer-facing support experience.

Responsibilities

Primary responsibilities include customer-facing support, design migration, and collaboration with R&D. Key tasks:

• Provide technical support for Zebu emulation and Protocompiler prototyping across partitioning, synthesis, place-and-route, and hardware debug.
• Migrate customer designs to new software releases and resolve regressions or performance issues.
• Deploy new software features on customer designs and assist adoption of advanced partitioning and debug modes.
• Deliver technical training from basic tool usage to advanced multi-FPGA workflows and hardware-software co-verification.
• Work with HAV R&D to create reproducible test cases, report issues, and advocate product improvements based on field feedback.
• Support pre-sales evaluations by running customer designs through emulation/prototyping flows and demonstrating technical value.
• Occasional travel to customer sites for onsite support, training, or critical issue resolution.

Requirements

Concise list of must-have and nice-to-have skills for performing the role.

• Must-have: Hands-on experience with FPGA logic design and implementation (synthesis, place & route, timing closure).
• Must-have: Strong ability to read, debug, and modify RTL (Verilog/SystemVerilog or VHDL) and to diagnose why designs fail in hardware versus simulation.
• Must-have: Practical understanding of FPGA architecture and back-end implementation flows, including resource utilization, CDC, and design partitioning.
• Must-have: Ability to reproduce customer issues locally, analyze logs and waveforms, and produce actionable bug reports for R&D.
• Nice-to-have: Exposure to Xilinx or Altera (Intel) synthesis tools; familiarity with Synopsys prototyping or emulation hardware/software.
• Nice-to-have: Experience with interface protocols (PCIe, AXI, UART, I2C) in hardware-software integration contexts.
• Nice-to-have: Scripting experience (Python, Tcl, shell) for automation and log analysis.

Education Requirements

Bachelor's degree in Electronics Engineering with 2–3 years of relevant experience, or a Master's degree in Electronics Engineering with 1–2 years of relevant experience, as specified in the source posting. No additional fields, certifications, or equivalent-experience language were stated.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.