Applications Engineering, Principal Engineer - STA

Job Title

Applications Engineering, Principal Engineer - Static Timing Analysis (PrimeTime)

Role Summary

Lead technical customer engagements for PrimeTime STA, focusing on pre-sales evaluations, hands-on training, and tape-out support. Act as the field technical expert who translates customer timing challenges into executable solutions and actionable R&D priorities.

Experience Level

Senior (Principal) — expects 10+ years of hands-on ASIC/SoC timing analysis experience; Master's-level candidates with ~8+ years are also considered.

Responsibilities

Primary responsibilities involve customer-facing technical work, cross-team collaboration, and automation to improve timing closure workflows.

• Drive PrimeTime adoption via competitive benchmarking, proof-of-concepts, and technical-win strategies.
• Deliver hands-on customer training on STA workflows, timing-closure techniques, process variation analysis, and signal-integrity debugging.
• Provide tape-out support: troubleshoot timing violations, setup/hold issues, and corner-case scenarios on production designs.
• Collaborate with R&D to report field issues, communicate customer requirements, and influence product enhancements.
• Coordinate with sales, marketing, and field teams to present PrimeTime's technical advantages to engineering teams and management.
• Develop and refine TCL-based automation scripts and methodologies to improve customer productivity and timing-closure efficiency.
• Support interactions across the full digital design flow, interfacing with synthesis, physical design, extraction, and ECO processes.

Requirements

Must-have technical skills and professional experience. Education details are under "Education Requirements."

• Extensive hands-on experience with Synopsys PrimeTime: running STA, analyzing reports, and debugging violations in real designs.
• Strong understanding of timing corners, process variation, on-chip variation (OCV), advanced OCV (AOCV), statistical STA, and signal-integrity impacts on timing.
• Familiarity with the digital design flow: synthesis, place-and-route, parasitic extraction, and ECO methodologies.
• Proven TCL scripting skills for automation, flow customization, and productivity improvements.
• Demonstrated customer-facing experience: training, technical support, and communicating complex concepts to engineering teams and management.
• Ability to collaborate effectively with R&D and field teams and translate customer challenges into product priorities.
• Willingness to travel to customer sites for training, support, and technical engagements.

Nice-to-have: prior experience leading competitive benchmarks, tape-out support on advanced process nodes, or roles focused on tool evangelism and methodologies.

Education Requirements

Bachelor's degree in Electrical Engineering (or equivalent) with 10+ years of relevant experience, or Master's degree with 8+ years of experience. Equivalent practical experience is acceptable.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.