Job Title
Applications Engineer, Senior Engineer
Role Summary
Senior applications engineer on the MIPI IP Applications Engineering team in Porto supporting integration of Camera and Display IP into customer SoCs. Partner with field engineers, customers, and internal product teams to ensure successful RTL integration, verification, timing closure, and tape-out.
Experience Level
Senior level. The posting specifies degree-plus-experience guidance: Bachelor's degree with 4+ years or Master's degree with 2+ years of hands-on ASIC design experience.
Responsibilities
The role focuses on customer-facing technical support across the ASIC design flow and on producing consumable documentation for field and customer use.
- Provide technical support for integration of Synopsys MIPI Camera and Display IP into customer SoCs.
- Support customers through IP installation, training, RTL integration, verification, synthesis, timing closure, and production testing.
- Conduct technical design reviews at key customer milestones to identify and mitigate integration issues early.
- Debug customer issues using Verilog HDL, simulation, synthesis, and static timing analysis across the flow.
- Author application notes and technical collateral to document integration best practices and solutions.
- Collect and relay customer feedback to R&D, product management, and IP development to influence product improvements and roadmap.
- Collaborate with the global applications engineering team to share knowledge and build reusable support solutions.
Requirements
Must-have technical skills and experience required to perform the role; plus items are listed separately.
- Practical experience with Verilog HDL, RTL design, simulation, synthesis, and static timing analysis.
- Proven ability to debug complex issues across multiple stages of the ASIC design flow.
- Experience supporting or working directly with customers or cross-functional engineering teams.
- Strong verbal and written communication skills in English, able to explain technical concepts clearly.
- Ability to manage multiple concurrent customer engagements and follow through to resolution.
Nice-to-have / beneficial skills:
- Familiarity with place-and-route, design reuse, physical design, or analog design.
- Familiarity with MIPI protocols, high-speed SERDES, or parallel interface standards.
- Comfort using AI tools to enhance productivity for code analysis, documentation, or debugging assistance.
Education Requirements
Bachelor's degree with 4+ years or Master's degree with 2+ years of hands-on experience in ASIC design (as stated in the posting).
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-06-28