Analog / VLSI Design Engineer

Job Title

Analog / VLSI Design Engineer

Role Summary

Design and implement analog and mixed-signal circuits focused on SerDes, SRAM, and high-speed interface blocks. Work within an IC design team to produce custom layouts, perform simulation and verification, and support silicon validation and lab characterization.

Experience Level

Mid-level. No explicit years-of-experience specified.

Responsibilities

The primary responsibilities include designing, verifying, and validating analog/mixed-signal IP and custom layouts for high-speed interfaces and SRAM.

• Design analog and mixed-signal circuits for SerDes and SRAM applications.
• Develop high-speed blocks: serializers, deserializers, clocking circuits, and digital control logic.
• Design and optimize SRAM components including bitcells, sense amplifiers, and decoders.
• Create custom IC layouts and perform DRC/LVS and parasitic extraction.
• Simulate and analyze circuit performance across power, timing, noise, reliability, and PVT corners.
• Support chip bring-up, validation, debugging, characterization, and lab testing.

Requirements

Must-have technical skills and tools for successful performance in this role.

• Proven experience in analog/mixed-signal IC design and custom layout.
• Hands-on experience with SerDes and SRAM design and verification.
• Proficiency with EDA tools (Synopsys or Cadence) and circuit simulators (HSPICE).
• RTL/verilog familiarity for mixed-signal verification and experience with MATLAB or Python for analysis and scripts.
• Experience with layout verification workflows: DRC, LVS, and parasitic extraction.
• Experience supporting silicon validation, lab characterization, and debugging.
• Nice-to-have: familiarity with PCIe, USB, MIPI, SPI, I2C, and analog blocks such as ADCs, DACs, LDOs, amplifiers, comparators, oscillators, and bandgap references.

Education Requirements

Not specified.

About the Company

Company: Beacon Industries

Technology/engineering company focused on analog and mixed-signal integrated circuit design and custom IC layout (SerDes, SRAM, high-speed interfaces), using Synopsys/Cadence EDA tools for design, simulation, verification, and silicon validation.