Analog/RF IC Layout Design Engineer

Job Title

Analog/RF IC Layout Design Engineer

Role Summary

Work on custom transistor-level layout for Analog/RF ASICs and MMICs to support Keysight's test and measurement products. The role partners closely with IC designers, process and CAD experts to produce full-chip layouts, drive sign-off verifications, and develop layout automation and methodologies to improve productivity.

Experience Level

Senior — requires extensive hands-on experience; posting specifies 7+ years of relevant layout experience.

Responsibilities

Primary responsibilities span cell-level layout through full-chip assembly, verification, and coordination with design teams.

• Create transistor-level layouts from schematics (cell-level to full-chip).
• Perform DRC, LVS, antenna checks, metal density fixes, and ensure Layout XL compliance.
• Place device primitives following best practices for thermal behavior and device matching (common-centroid, dummy matching, interdigitation, RF symmetry).
• Collaborate with IC designers on critical circuit nodes, matching, and current-density requirements.
• Address electro-migration and metallization density issues and implement fixes.
• Assist with floorplanning, creating grid cells, and custom layout structures.
• Coordinate layout work across internal engineers and external contractors.
• Complete chip-level sign-off verifications.

Requirements

Must-have technical skills and experience required for immediate contribution.

• 7+ years of custom analog IC layout experience.
• 5+ years using Cadence Virtuoso Layout XL for cell-level design and full-chip verification (DRC, LVS, metal density/slot rules).
• Experience with sub-micron BiCMOS processes (130 nm and smaller).
• Strong knowledge of device matching techniques, parasitic effects, and layout practices to guarantee performance.
• Ability to manage multiple cell designs in parallel in a dynamic environment.
• Experience with version control systems (e.g., SVN, Cliosoft/SOS).
• Effective teamwork and communication skills to collaborate with IC design engineers and layout peers.

Nice-to-have

• Familiarity with Mentor Calibre DRC/LVS or similar sign-off tools.
• Layout experience for high-frequency (20+ GHz) bipolar signal path ICs.
• Linux fundamentals and scripting experience (SKILL or similar).
• OCEAN experience.
• Basic understanding of simple electrical circuits.

Education Requirements

BS or MS in Electrical Engineering (or applicable engineering degree) is listed as preferred; the posting also allows equivalent relevant experience in lieu of a degree. Fields mentioned include Electrical Engineering and related technical disciplines.

About the Company

Company: Keysight Technologies

Headquarters: Santa Rosa, CA, USA

Keysight Technologies is a global leader in electronic design, simulation, and test and measurement solutions for communications, automotive, aerospace, semiconductor, and industrial markets. The company provides instruments, software, and services to accelerate product development and manufacturing, employing approximately 15,000 people worldwide.