Analog / Mixed-Signal SerDes Design Engineer
QualcommJob Title
Analog / Mixed-Signal SerDes Design Engineer
Role Summary
Join Qualcomm's SerDes PHY team in Cork to design analog and mixed-signal integrated circuits for high-speed PHY receivers, transmitters, VCOs, PLLs and related IP for mobile, automotive, IoT and compute SoCs. Work focuses on low-power, low-voltage custom design in advanced FinFET and GAA process nodes.
The role combines transistor-level circuit design, collaboration with layout engineers, IP delivery and silicon characterization for SerDes and PLL hard macros.
Experience Level
Mid-level. Minimum practical expectation: 2+ years ASIC design/verification/integration experience (or 1+ year with a Master’s); 3+ years transistor-level analog mixed-signal design experience is preferred for SerDes/PLL work.
Responsibilities
Key responsibilities include design, verification and delivery of analog/mixed-signal hard macros for SerDes IP:
- Architect, design and develop analog/mixed-signal hard macros for SerDes IP.
- Perform custom circuit design for advanced FinFET/GAA CMOS processes.
- Create design specifications and behavioural models (Verilog) for IP blocks.
- Set up, run and analyze circuit simulations; perform quality assurance on macros.
- Collaborate with layout engineers to optimize analog layout and ensure sign-off.
- Support customer integration, silicon bring-up, characterization and verification reporting.
- Participate in internal requirements discussions and IP delivery schedules.
Requirements
Must-have technical skills and experience:
- Transistor-level analog/mixed-signal design experience (experience with high-speed SerDes, PLL, VCO, DDR or similar is highly relevant).
- Hands-on experience with SPICE simulators and schematic-capture tools.
- Experience designing op-amps, bandgaps, differential amplifiers, VCOs and PLLs.
- Experience with high-speed SerDes block-level designs (transmitters, receivers, VGA, CTLE, CDR).
- Scripting skills to automate circuit design and verification tasks.
- Full-custom analog layout skills, including extraction, verification and sign-off.
- Strong communication skills and ability to work in a high-performance team.
Nice-to-have:
- Understanding of signal integrity in high-speed wireline designs.
- Experience with advanced nanometer nodes (FinFET, GAA at 3nm and below), device physics, PDN design and SoC top-level integration.
Education Requirements
Bachelor's, Master’s or PhD in Science, Engineering or a related technical field. Posting specifies: Bachelor's + 2+ years ASIC-related experience; Master’s + 1+ year ASIC-related experience; or PhD (no specific experience requirement). Equivalent practical experience will be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
