Analog / Mixed-Signal Sensor IP Design Engineer
QualcommJob Title
Analog / Mixed-Signal Sensor IP Design Engineer
Role Summary
Design and deliver analog and mixed-signal Sensor IP hard macros (AFEs, ADCs, VCOs, bandgaps, etc.) for Qualcomm SoCs, focusing on low-power, low-voltage implementations in advanced FinFET nodes. Work on transistor-level circuit design, simulation, layout collaboration, and silicon bring-up within a multi-disciplinary ASIC design team.
Experience Level
Mid-level — typically 3–5+ years in analog/mixed-signal ASIC or IC design. The posting references ~4+ years transistor-level design experience; see Education Requirements for degree/experience equivalencies.
Responsibilities
Primary responsibilities include:
- Architect, design and develop analog/mixed-signal hard macros for Sensor IP.
- Custom transistor-level circuit design in advanced FinFET CMOS processes.
- Collaborate with layout engineers to produce optimized analog layouts and achieve sign-off.
- Define requirements and create design specifications and behavioral Verilog models.
- Set up, run and analyze SPICE circuit simulations; automate verification tasks via scripting.
- Perform quality assurance on developed hard macros and support customer integration and testing.
- Conduct silicon characterization and prepare silicon verification reports.
Requirements
Must-have technical skills and experience:
- Transistor-level analog/mixed-signal circuit design experience (designing op-amps, bandgaps, differential amplifiers, VCOs, AFEs, or ADCs).
- Proficiency with SPICE simulators and schematic capture tools.
- Scripting experience to automate design and verification tasks.
- Full-custom analog layout techniques and the ability to perform layout extraction, verification, and sign-off in collaboration with layout teams.
- Strong simulation, analysis and silicon debug skills; ability to produce verification reports.
- Good communication skills and experience working in cross-functional teams.
Nice to have:
- Experience in advanced nanometer FinFET nodes (3nm and beyond) and low-voltage/low-power design.
- Knowledge of device physics, power distribution networks (PDN), SoC top-level integration, and common IC design tool flows.
Education Requirements
Bachelor's, Master's, or PhD in Science, Engineering, or a related field. The posting specifies equivalencies: Bachelor's +4+ years, Master's +3+ years, or PhD +2+ years of relevant ASIC/IC design, verification, validation, integration, or related experience. Candidates with equivalent practical experience will be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
