Analog / Mixed-Signal IP DDR Design Senior Engineer
QualcommJob Title
Analog / Mixed-Signal IP DDR Design Senior Engineer
Role Summary
Design high-speed analog/mixed-signal IP blocks for DDR and chip-to-chip PHYs, focusing on Rx/Tx IO, DLL/PLL, clocking and related circuits. The role is part of Qualcomm's Analog Mixed-Signal IP (MSIP) team working on advanced FinFET and GAA process nodes for Snapdragon SoC products.
Experience Level
Senior - candidates are expected to have substantial hands-on analog/mixed-signal design experience (guidance in posting: preferred 5+ years transistor-level analog mixed-signal experience; minimum ASIC experience expectations listed in Education Requirements).
Responsibilities
Deliver transistor-level analog/mixed-signal IP from architecture through post-silicon support and collaborate with layout and physical design teams.
- Architect, design and develop high-speed mixed-signal circuits for LPDDR5/LPDDR6 and next-generation LPDDR systems.
- Design custom blocks: Rx/Tx IO, clock distribution, delay elements (DLL/PLL), reference and band-gap circuits.
- Develop circuits for next-generation chip-to-chip interfaces.
- Create schematics, run SPICE simulations and perform exhaustive pre-silicon validation.
- Support post-silicon bring-up and system enablement activities.
- Work closely with Analog Mask Layout and Physical Design teams to deliver IP on advanced process nodes.
- Address power delivery and signal/power integrity issues in high-speed designs.
Requirements
Key technical skills and experience required or strongly preferred for immediate contribution.
- Must-have: transistor-level analog/mixed-signal design experience (preferably in high-speed wireline DDR, SerDes, PLL or similar applications).
- Must-have: hands-on experience with SPICE simulators and schematic-capture tools.
- Must-have: experience designing op-amps, bandgaps, differential amplifiers, VCO/PLL/DLL and IO building blocks (transmitters, receivers, VGA, CTLE, CDR).
- Must-have: experience with full-custom analog layout techniques and ability to complete layout, extraction, verification and sign-off.
- Must-have: strong communication skills and proven ability to work in a high-performance engineering team.
- Preferred: experience with signal integrity in high-speed wireline design.
- Preferred: scripting and GenAI experience to automate design and verification tasks.
- Preferred: experience with advanced process nodes and collaboration with physical design teams.
Education Requirements
Degrees accepted: Bachelor's, Master’s or PhD in Science, Engineering, or a related field. The posting specifies combinations of degree and experience (e.g., Bachelor's + experience, Master’s + reduced experience, PhD as alternative). Applications with equivalent practical experience will be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
