Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Job Title

Analog/Mixed-Signal IC Design Engineer — Acacia (Hybrid)

Role Summary

Member of the Acacia mixed-signal IC design team developing high-speed, high-accuracy analog designs for optical transceivers (100G–1.6T+). The role involves architecture, circuit design, layout, silicon bring-up, and productization for ultra-deep-submicron CMOS products.

This is a hybrid role based in the San Jose, CA office (three days per week on-site). The team collaborates with digital/DSP, system, package, and module design groups.

Experience Level

Senior. Typical experience expectations: Bachelor’s +8 years, Master’s +6 years, or PhD +3 years of related IC design experience.

Responsibilities

Design and deliver analog/mixed-signal blocks for high-speed optical transceivers; lead block-level efforts and collaborate across disciplines.

• Architect, design, simulate, layout and verify high-speed AMS circuits from concept through production.
• Lead a large block on complex SoCs: set goals, track deliverables, and mentor junior engineers.
• Perform silicon bring-up, measurement, characterization, and debug of ICs in the lab.
• Participate in peer design reviews and enforce solid design methodologies.
• Collaborate with packaging and hardware teams to meet signal and power integrity targets.
• Ensure design for manufacturability: PVT characterization, IR drop and electromigration considerations.
• Contribute to layout planning and high-frequency floorplanning to meet performance and reliability requirements.

Requirements

Technical must-haves and reasonable expectations for success in this role. Education degree requirements are listed separately below.

• Significant hands-on experience designing, simulating and measuring high-speed ICs; experience must cover at least three of the areas below:
• High-speed serial links (SERDES): serializers, deserializers, and data converters
• High-performance output drivers
• Phase-locked loops (PLLs) and clock distribution
• Op amps and programmable gain amplifiers (PGAs)
• Equalization techniques and high-frequency signal conditioning
• Modeling requirements for system link simulations and clock propagation
• Experience with mixed-signal design flows and verification; familiarity with AMS simulations and mixed-signal toolchains.
• High-frequency layout experience, including power/ground partitioning and analog/digital routing considerations.
• Ability to lead block-level design efforts, mentor team members, and manage deliverables.

Nice-to-have:

• Experience with FinFET/GAA technologies and advanced process nodes.
• Experience with transceiver applications (backplane and cable communications).
• Experience with Cadence Virtuoso, Spectre/SpectreX/APS, Calibre, EMX, MATLAB, and mixed-signal validation tools.
• Lab validation experience including ESD practices and construction of complex test setups.

Education Requirements

Required: Bachelor's degree plus 8 years, Master's degree plus 6 years, or PhD plus 3 years of related experience (degree discipline not specified). Equivalent practical experience accepted as shown by the degree/experience mappings above.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).