Job Title
Analog/Mixed-Signal IC Design Engineer β Acacia (Hybrid)
Role Summary
Member of the Acacia mixed-signal IC design team developing high-speed analog and mixed-signal blocks for optical transceivers. Work covers architecture, circuit design, layout, measurement and productization of ultra-deep submicron CMOS ICs integrated into complex ASICs.
Experience Level
Senior-level β typically requires substantial prior experience in high-speed analog/mixed-signal IC design (see Requirements and Education Requirements for specifics).
Responsibilities
Responsible for leading design work, collaborating across disciplines, and delivering production-ready mixed-signal blocks.
- Architect, design, layout, simulate and measure high-speed analog/mixed-signal IC blocks.
- Lead a large block on complex chips; mentor junior engineers and track deliverables.
- Participate in peer reviews and establish design methodology from concept to production.
- Collaborate with digital/DSP, system, package and module teams to meet signal and power-integrity requirements.
- Support laboratory validation, characterization and bring-up activities.
Requirements
Must-have technical skills and experience.
- Proven experience designing, simulating and testing high-speed ICs (experience across multiple of the areas listed below is required).
- Hands-on experience with high-speed serial links (SERDES), data converters and serializers/deserializers.
- Design experience with high-performance output drivers and phase-locked loops (PLLs); clock distribution and timing/propagation techniques.
- Analog circuit experience including op-amps, programmable gain amplifiers and equalization techniques.
- High-frequency layout and floorplanning experience focused on power/ground, analog/digital isolation and routing.
- Ability to lead block-level work, participate in detailed peer review, and collaborate with cross-functional teams to meet SI/PI targets.
Nice-to-have / Preferred:
- Experience with electrical transceiver applications (backplane and cable communications).
- Experience with FinFET and GAA process technologies.
- Design-for-manufacturability skills: characterization across PVT, electromigration, self-heating and IR-drop analysis.
- Laboratory validation experience including ESD methodology and test-setup construction.
- Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS mixed-signal simulation flows and Matlab.
Education Requirements
Minimum qualifications specified: Bachelor's degree + 8 years of related experience, OR Master's degree + 6 years of related experience, OR PhD + 3 years of related experience.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-07