Job Title
Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Join the Acacia mixed-signal IC team to architect, design, layout, measure and productize ultra-deep-submicron CMOS analog and mixed-signal circuits for high-speed optical transceivers (100G–1.6T+). The team collaborates closely with digital/DSP, system, package and module groups.
This hybrid role is expected on-site three days per week in San Jose, CA.
Experience Level
Senior-level. Typical experience profile aligns with 7+ years of relevant IC design experience (see Education Requirements for specific degree-to-years guidance).
Responsibilities
Contribute to complex mixed-signal ASIC blocks from concept through production; lead and mentor team members; validate designs in lab and collaborate with cross-functional teams to meet system and packaging requirements.
- Architect and design high-speed analog/mixed-signal blocks (serdes, ADC/DAC interfaces, drivers, PLLs, opamps, PGAs, equalizers).
- Perform simulation, layout review, and sign-off for performance, signal and power integrity.
- Lead a large block on complex chips, own deliverables and schedule, and participate in peer design reviews.
- Develop test plans and validate prototypes in the lab, including ESD and measurement setups.
- Collaborate with package and hardware teams to meet SI/PI and manufacturability targets.
Requirements
Must-have technical experience and tools; list distinguishes core requirements and preferred skills.
- Proven hands-on experience designing, simulating and measuring high-speed ICs, with demonstrated work in at least three of the following areas: high-speed serial links (serdes, data converters), output drivers, PLLs, clock distribution, opamps/PGAs, and equalization techniques.
- Experience with high-frequency layout and floorplanning for mixed-signal designs (power/ground separation, analog/digital routing, passive/component placement).
- Design-for-manufacturability skills: PVT characterization, EM/IR analysis, self-heating considerations.
- Laboratory validation experience including test fixture creation and ESD methodology.
- Familiarity with industry design tools such as Cadence Virtuoso, Spectre/SpectreX/APS, Calibre, EMX, AMS simulators, and Matlab.
- Strong problem-solving, ownership of deliverables, and ability to mentor junior engineers.
Nice-to-have:
- Experience with FinFET or GAA process technologies and electrical transceiver applications (backplane, cable).
- Experience with mixed-signal co-simulation and system-level link modeling.
Education Requirements
Minimum qualification specifies degree-plus-experience combinations: Bachelor's degree with 8+ years related experience, Master’s degree with 6+ years related experience, or PhD with 3+ years related experience. The posting does not specify required fields of study or certifications.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-02