Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Cisco SystemsJob Title
Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Member of the Acacia Mixed Signal Design team responsible for architecting, designing, laying out, measuring and productizing ultra-deep-submicron CMOS analog and mixed-signal blocks for high-speed optical transceivers.
This is a hybrid role (three days per week on-site) collaborating with digital/DSP, system, package and module teams to meet performance, signal and power-integrity targets.
Experience Level
Senior — role expects experienced engineers (typically 7+ years of relevant industry experience).
Responsibilities
Primary responsibilities include technical leadership of analog/mixed-signal IC blocks and hands-on circuit design through production.
- Architect, design, simulate, layout and validate high-speed AMS circuits and blocks for optical transceivers.
- Lead a large block on complex chips, drive deliverables, and mentor junior engineers.
- Perform peer reviews and establish solid design methodology from conception to production.
- Collaborate with packaging and hardware teams to meet signal and power integrity requirements.
- Develop lab validation setups, characterize silicon across PVT, and support product bring-up and qualification.
Requirements
Technical must-haves and practical skills required to perform the role.
- Proven experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (SERDES, ADC/DAC), system link modeling, high-performance output drivers, phase-locked loops, clock distribution, op amps/programmable gain amplifiers, and equalization techniques.
- Hands-on experience with high-frequency/layout techniques including floorplanning, power/ground routing and analog/digital isolation.
- Experience with design-for-manufacturability practices: PVT characterization, electromigration, self-heating and IR-drop analysis.
- Laboratory validation experience, including ESD practices and building test setups for silicon bring-up.
- Exposure to mixed-signal simulation and verification flows (AMS/mixed-signal simulation tools) and layout validation tools.
- Nice-to-have: experience with FinFET or GAA technologies, EM/co-simulation tools, Cadence Virtuoso/Spectre (SpectreX/APS), Calibre, EMX and Matlab.
Education Requirements
Minimum qualification: Bachelor's degree plus 8 years of related experience, or Master's degree plus 6 years of related experience, or PhD plus 3 years of related experience (or equivalent practical experience).
Additional Information
The role supports development of high-speed optical transceivers (100G–1.6T+). This is a hybrid position based in San Jose, CA (three days per week on-site). Compensation for U.S./Canada locations is posted by the employer and may vary by location and individual factors.
Information on benefits and paid time-off was provided by the employer.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).
