Job Title
Analog/Mixed-Signal IC Design Engineer - Acacia (Hybrid)
Role Summary
Join the Acacia mixed-signal IC design team to architect, design, layout, measure and productize ultra-deep sub-micron CMOS analog and mixed-signal circuits for high-speed optical transceivers (100Gβ1.6T+).
This is a hybrid role performed three days per week from the San Jose, CA office; you will collaborate with digital/DSP, system, package and module teams.
Experience Level
Senior β role expects experienced IC designers. Typical experience guidance: Bachelor's +8 years, Master's +6 years, or PhD +3 years (see Education Requirements for details).
Responsibilities
Contribute as a lead designer on complex mixed-signal ASIC blocks and support the product lifecycle from concept to production.
- Architect, design, simulate and verify high-speed analog/mixed-signal circuits (including layout and measurement).
- Lead design efforts for large blocks, mentor junior engineers, and track deliverables to schedule.
- Perform peer reviews and maintain robust design methodology and documentation.
- Collaborate with package, hardware and system teams to meet signal and power integrity requirements.
- Support characterization, lab validation and product bring-up activities.
- Drive design-for-manufacturability analyses (PVT characterization, EM, self-heating, IR drop) and work with foundry/packaging partners as needed.
Requirements
Must-have technical experience and skills; candidates should meet the minimum qualification above (degrees/years summarized under Education Requirements).
- Experience designing, simulating and measuring high-speed ICs in at least three of the following areas: high-speed serial links (serdes/data converters), system link modeling, high-performance output drivers, phase-locked loops (PLLs), clock transmission/propagation, op amps/programmable gain amplifiers, and equalization techniques.
- Hands-on experience with layout for high-frequency designs, including floorplanning, power/ground and analog/digital routing.
- Design-for-manufacturability experience: PVT characterization, electromigration, self-heating and IR drop analysis.
- Lab validation experience, including test setup construction and ESD practices.
- Tool experience: Cadence Virtuoso, Spectre/SpectreX/APS, layout verification tools (Calibre), EMX; mixed-signal simulation (AMS) and MATLAB.
- Strong problem-solving, attention to detail, and ability to work both independently and in collaborative teams.
Preferred:
- Experience with electrical transceiver applications (backplane and cable communications).
- Experience with FinFET or GAA process technologies.
Education Requirements
Minimum qualification: Bachelor's degree plus 8 years of relevant experience, or Master's degree plus 6 years, or PhD plus 3 years of relevant experience. (These degree + years combinations are the stated minimums in the posting.)
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-07-09