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Analog/Mixed-Signal IC Design Engineer - Acacia

Cisco Systems
July 07, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$168,800 - $241,200 USD yearly
VLSI Design Jobs, Level - Senior

Job Title

Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Member of the Acacia mixed-signal IC design team developing high-speed analog circuits for optical transceivers (100G–1.6T+). Work across analog, digital/DSP, package and module teams to deliver silicon from architecture through production.

This is a hybrid role with an expected in-office cadence of three days per week in San Jose, CA.

Experience Level

Senior-level. See Education Requirements for the formal degree + years combinations that indicate the expected experience level.

Responsibilities

Design, validate and productize high-speed mixed-signal blocks for optical transceivers; lead technical efforts and coordinate across disciplines.

  • Architect, circuit-design, layout and measurement of ultra-deep-submicron CMOS mixed-signal ICs.
  • Lead a large block on complex chips, track deliverables and drive schedules to production.
  • Mentor and review work from other designers; perform peer reviews and enforce design methodology.
  • Collaborate with digital/DSP, package, system and hardware teams to meet signal and power integrity targets.
  • Develop and validate test setups and lab measurements; support characterization across PVT and operating conditions.

Requirements

Key technical skills and domain expertise required. Candidates should demonstrate strong hands-on AMS design, validation and cross-team collaboration.

  • Demonstrated experience designing, simulating and measuring high-speed ICs in at least three of the following areas: serializers/deserializers and data converters; system link modeling; high-performance output drivers; phase-locked loops (PLLs); clock transmission/propagation; opamps and programmable gain amplifiers; equalization techniques.
  • Proven ability to take complex analog blocks from concept through layout, verification and silicon bring-up.
  • Experience with high-frequency layout and floorplanning to support analog/digital segregation, power and signal routing.
  • Practical lab validation experience, including test-setup construction and measurement instrumentation.
  • Strong problem-solving, communication skills and experience mentoring or leading small design teams.
  • Familiarity with mixed-signal simulation flows and layout verification tools.

Nice-to-have:

  • Experience with electrical transceiver applications (backplane and cable links).
  • Experience with FinFET or GAA process technologies.
  • Design-for-manufacturability experience: characterization over PVT, electromigration, self-heating and IR drop analysis.
  • ESD practices and advanced lab validation methodologies.
  • Tool experience: Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulation and MATLAB.

Education Requirements

One of the following combinations is required: Bachelor's degree plus ~8 years related experience, Master’s degree plus ~6 years related experience, or PhD plus ~3 years related experience (as listed in the posting). No specific field-of-study was specified in the posting.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-07-07