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Analog/Mixed-Signal IC Design Engineer - Acacia

Cisco Systems
May 21, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$168,800 - $241,200 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Join the Acacia mixed-signal IC design team to architect, design, layout, measure and productize high-speed analog and mixed-signal CMOS circuits for optical transceivers (100G–1.6T+ markets). Work cross-functionally with digital/DSP, system, package and module teams to meet signal and power integrity and production requirements.

Experience Level

Senior-level. The role requires significant industry experience (see Education Requirements for the minimum experience by degree).

Responsibilities

Deliver and validate complex analog/mixed-signal blocks from concept to production and mentor team members.

  • Architect, design, simulate, layout and verify high-speed AMS circuits (serial links, drivers, PLLs, opamps, equalizers, ADC/DAC elements).
  • Lead a major block on complex chips, manage deliverables and participate in peer design reviews.
  • Collaborate with digital/DSP, package, system and hardware teams to ensure signal and power integrity requirements are met.
  • Perform laboratory validation and characterization, including test setup construction and measurement.
  • Define and apply design-for-manufacturability practices (PVT characterization, IR drop, electromigration, self-heating analysis).
  • Provide mentorship and technical direction to junior engineers.

Requirements

Core technical skills and experience required; additional items are preferred.

Must-have:

  • Proven experience designing, simulating and measuring high-speed ICs in multiple areas such as high-speed serial links (SERDES), high-performance output drivers, PLLs, clock distribution, opamps/PGAs and equalization techniques.
  • Hands-on experience with mixed-signal design and verification tools (Cadence Virtuoso, Spectre/APS/SpectreX, AMS simulations, layout validation tools such as Calibre).
  • High-frequency layout skills (floorplanning, power/ground partitioning, analog/digital signal routing) and mixed-signal integration experience.
  • Experience building and executing lab validation and measurement setups.
  • Ability to work independently and in small-team, cross-functional settings; track record of delivering production chips.

Nice-to-have:

  • Experience with FinFET or GAA process technologies.
  • Background in electrical transceiver applications (backplane and cable communications).
  • Familiarity with EM, ESD practices, EMX and Matlab for analysis and modelling.

Education Requirements

Minimum qualification: Bachelor's degree plus 8 years related experience, or Master's degree plus 6 years related experience, or PhD plus 3 years related experience ("related experience" accepted as equivalent). The posting specifies degree + years combinations but does not list specific fields of study.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-05-21