Analog/Mixed-Signal IC Design Engineer - Acacia

Job Title

Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Member of the Acacia Mixed Signal Design team responsible for architecting, designing, laying out, measuring and productizing ultra-deep sub-micron CMOS analog/mixed-signal blocks for high-speed optical transceivers (100G–1.6T+). Work involves close collaboration with digital/DSP, system, package and module teams to meet integration, signal and power integrity targets.

This is a hybrid role requiring onsite presence three days per week at the San Jose, CA office.

Experience Level

Senior — see Education Requirements for degree and years-of-experience guidance (typical: Bachelor's +8 years; Master's +6; PhD +3).

Responsibilities

Technical and leadership responsibilities spanning concept through production:

• Architect, design, simulate, layout and verify high-speed analog/mixed-signal IC blocks (including circuits operating at and above ~25 Gb/s).
• Lead design efforts for large/complex blocks, track deliverables and mentor team members.
• Perform circuit- and system-level modeling to meet signal and power integrity specifications.
• Develop and execute laboratory validation and characterization plans; support productization and tapeout activities.
• Collaborate with digital/DSP, package, hardware and module teams to ensure integration and performance targets are met.
• Participate in peer design reviews and establish robust design methodology from conception to production.

Requirements

Must-have technical skills and experience:

• Proven experience designing, simulating and measuring high-speed ICs and mixed-signal analog circuits.
• Experience in at least three of the following areas:
  • High-speed serial links (serializers/deserializers, data converters)
  • Modeling requirements for system link simulations
  • High-performance output drivers
  • Phase-locked loops and efficient clock transmission/propagation
  • Opamps and programmable gain amplifiers
  • Equalization techniques
• Experience with ultra-deep sub-micron CMOS analog/mixed-signal design and mixed-signal simulation flows.
• Strong problem-solving skills and ability to work independently and collaboratively in cross-functional teams.

Nice-to-have:

• Experience with FinFET or GAA technologies.
• High-frequency layout and floorplanning experience, including routing for power/ground and analog/digital domains; experience with passives (inductors, transformers, transmission lines).
• Design-for-manufacturability experience: characterization over PVT, electromigration, self-heating and IR-drop analysis.
• Laboratory validation experience including ESD practices and construction of test setups.
• Familiarity with Cadence Virtuoso, Spectre/APS/SpectreX, Virtuoso/Calibre, EMX, AMS mixed-signal simulations and Matlab.

Education Requirements

Required: Bachelor's degree plus 8 years related experience, or Master's degree plus 6 years, or PhD plus 3 years. Equivalent practical experience is accepted in lieu of the degree-based requirements. No specific field of study was specified in the posting.

About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).