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Analog/Mixed-Signal IC Design Engineer - Acacia

Cisco Systems
July 09, 2026
Full-time
Remote friendly (San Jose, California, United States)
Worldwide
$168,800 - $241,200 USD yearly
VLSI Design Jobs, Level - Senior

Job Title

Analog/Mixed-Signal IC Design Engineer - Acacia

Role Summary

Join Acacia's mixed-signal IC design team to architect, design, layout, measure and productize ultra-deep sub-micron CMOS analog and mixed-signal circuits for high-speed optical transceivers (100G–1.6T+).

The role is hybrid (three days per week in the San Jose, CA office) and involves close collaboration with digital/DSP, system, package and module teams. This position balances independent technical execution with mentoring and peer review responsibilities.

Experience Level

Senior β€” hiring profile expects substantial experience (see Education Requirements for specific year thresholds). Typical incumbents lead large blocks, mentor peers, and drive deliverables on complex SoC projects.

Responsibilities

Core responsibilities include design leadership across analog/mixed-signal blocks and hands-on circuit development.

  • Architect, design, simulate, layout and validate high-speed AMS circuits (serial links, drivers, PLLs, ADC/DAC, equalizers, op-amps/PGA).
  • Lead a large block on complex chips: set technical direction, track deliverables, and mentor junior engineers.
  • Perform lab characterization, debug, and productize designs (PVT characterization, IR drop, electromigration, self-heating considerations).
  • Participate in peer reviews and establish robust design methodology from conception through production.
  • Collaborate with package and hardware teams to meet signal and power integrity requirements and support test/validation setups.

Requirements

Must-have technical experience and skills. Preferred items listed separately as nice-to-have.

  • Proven experience designing, simulating and measuring high-speed ICs in multiple areas such as serializers/deserializers, data converters, high-performance output drivers, PLLs, clock distribution, op-amps/PGA, and equalization techniques.
  • Experience with high-speed serial link architectures and system-level link modeling for signal integrity.
  • Hands-on experience with layout and floorplanning for high-frequency designs, including power/ground partitioning and analog/digital isolation.
  • Ability to lead complex analog/mixed-signal blocks, mentor teammates, and deliver to aggressive schedules.
  • Nice-to-have: electrical transceiver application experience (backplane/cable), FinFET/GAA process experience, EM/IR analysis, ESD methodology, and lab test setup construction.
  • Nice-to-have tool experience: Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, AMS simulations, and MATLAB.

Education Requirements

Minimum qualifications specify: Bachelor's degree plus 8 years related experience, or Master's degree plus 6 years related experience, or PhD plus 3 years related experience. (Degrees explicitly required per posting; no specific field-of-study was listed.)


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-07-09